[regalloc] Make RegMask clobbers prevent merging vreg's into PhysRegs when hoisting...

Summary:
This prevents vreg260 and D7 from being merged in:
  %vreg260<def> = LDC1 ...
  JAL <ga:@sin>, <regmask ... list not containing D7 ...>
  %D7<def> = COPY %vreg260; ...
Doing so is not valid because the JAL clobbers the D7.

This fixes the almabench regression in the LLVM 3.7.0 release branch.

Reviewers: MatzeB

Subscribers: MatzeB, qcolombet, hans, llvm-commits

Differential Revision: http://reviews.llvm.org/D11649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243745 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/RegisterCoalescer.cpp b/lib/CodeGen/RegisterCoalescer.cpp
index 7afea2a4f6ff077555d8851c9765554806f1e533..c911b9b47ea2c9c7a2998a3691e8646b6cbd7675 100644 (file)
--- a/lib/CodeGen/RegisterCoalescer.cpp
+++ b/lib/CodeGen/RegisterCoalescer.cpp
@@ -1531,6 +1531,14 @@ bool RegisterCoalescer::joinReservedPhysReg(CoalescerPair &CP) {
         DEBUG(dbgs() << "\t\tInterference (read): " << *MI);
         return false;
       }
+
+      // We must also check for clobbers caused by regmasks.
+      for (const auto &MO : MI->operands()) {
+        if (MO.isRegMask() && MO.clobbersPhysReg(DstReg)) {
+          DEBUG(dbgs() << "\t\tInterference (regmask clobber): " << *MI);
+          return false;
+        }
+      }
     }
 
     // We're going to remove the copy which defines a physical reserved