notes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26856 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/README.txt b/lib/Target/PowerPC/README.txt
index c4cf30354378138be5a3ae84afef31e77510b84e..42a644c1f33cf2df19a3e9c28d8c9892f4198df4 100644 (file)
--- a/lib/Target/PowerPC/README.txt
+++ b/lib/Target/PowerPC/README.txt
@@ -506,6 +506,7 @@ Implement PPCInstrInfo::isLoadFromStackSlot/isStoreToStackSlot for vector
 registers, to generate better spill code.
 
 ===-------------------------------------------------------------------------===
+
 int foo(int N, int ***W, int **TK, int X) {
   int t, i;
   
@@ -518,5 +519,20 @@ int foo(int N, int ***W, int **TK, int X) {
 
 We generate relatively atrocious code for this loop compared to gcc.
 
+===-------------------------------------------------------------------------===
+
+Altivec support.  The first should be a single lvx from the constant pool, the
+second should be a xor/stvx:
 
+void foo(void) {
+  int x[8] __attribute__((aligned(128))) = { 1, 1, 1, 1, 1, 1, 1, 1 };
+  bar (x);
+}
+
+#include <string.h>
+void foo(void) {
+  int x[8] __attribute__((aligned(128)));
+  memset (x, 0, sizeof (x));
+  bar (x);
+}