rk3188: fix CORE_CLK_DIV define error
authorchenxing <chenxing@rock-chips.com>
Sat, 18 May 2013 05:17:38 +0000 (13:17 +0800)
committerchenxing <chenxing@rock-chips.com>
Sat, 18 May 2013 05:17:38 +0000 (13:17 +0800)
arch/arm/mach-rk3188/include/mach/cru-rk3188.h

index 7f0fd8aee14b33b694769744970601de557d0a9e..b7077e5572a6ed2339c290e5c28f57109d61bec9 100755 (executable)
@@ -121,7 +121,7 @@ enum rk_plls_id {
 
 #define CORE_CLK_DIV_W_MSK     (0x1F << 25)
 #define CORE_CLK_DIV_MSK       (0x1F << 9)
-#define CORE_CLK_DIV(i)                (((i) - 1) & 0x1F)
+#define CORE_CLK_DIV(i)                ((((i) - 1) & 0x1F) << 9)
 
 #define CPU_SEL_PLL_MSK                (1 << 5)
 #define CPU_SEL_PLL_W_MSK      (1 << 21)