video: tegra: set h/v sync polarity for HDMI

Change-Id: I4be0eb963c3779b9313ef94476b1589059d4aa3c
Signed-off-by: Erik Gilling <konkers@android.com>

diff --git a/drivers/video/tegra/dc/hdmi.c b/drivers/video/tegra/dc/hdmi.c
index b3eb86220ab47abdf3da91addfd5cc22e4771f8e..b214f2c41db3d2bf8e17ec404631ce2a7e16f901 100644 (file)
--- a/drivers/video/tegra/dc/hdmi.c
+++ b/drivers/video/tegra/dc/hdmi.c
@@ -1052,16 +1052,23 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
                val = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PWR);
        } while (val & SOR_PWR_SETTING_NEW_PENDING);
 
-       tegra_hdmi_writel(hdmi,
-                         SOR_STATE_ASY_CRCMODE_COMPLETE |
-                         SOR_STATE_ASY_OWNER_HEAD0 |
-                         SOR_STATE_ASY_SUBOWNER_BOTH |
-                         SOR_STATE_ASY_PROTOCOL_SINGLE_TMDS_A |
-                         /* TODO: to look at hsync polarity */
-                         SOR_STATE_ASY_HSYNCPOL_POS |
-                         SOR_STATE_ASY_VSYNCPOL_POS |
-                         SOR_STATE_ASY_DEPOL_POS,
-                         HDMI_NV_PDISP_SOR_STATE2);
+       val = SOR_STATE_ASY_CRCMODE_COMPLETE |
+               SOR_STATE_ASY_OWNER_HEAD0 |
+               SOR_STATE_ASY_SUBOWNER_BOTH |
+               SOR_STATE_ASY_PROTOCOL_SINGLE_TMDS_A |
+               SOR_STATE_ASY_DEPOL_POS;
+
+       if (dc->mode.flags & TEGRA_DC_MODE_FLAG_NEG_H_SYNC)
+               val |= SOR_STATE_ASY_HSYNCPOL_NEG;
+       else
+               val |= SOR_STATE_ASY_HSYNCPOL_POS;
+
+       if (dc->mode.flags & TEGRA_DC_MODE_FLAG_NEG_V_SYNC)
+               val |= SOR_STATE_ASY_VSYNCPOL_NEG;
+       else
+               val |= SOR_STATE_ASY_VSYNCPOL_POS;
+
+       tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_STATE2);
 
        val = SOR_STATE_ASY_HEAD_OPMODE_AWAKE | SOR_STATE_ASY_ORMODE_NORMAL;
        tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_STATE1);