ReleaseNotes: Add Hexagon Target section

And mention removal of hexagonv2 and hexagonv3 support (r176859).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176860 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst
index 9383c5b3fa1572c0e360bbaa3dc668662049e6f7..5ee67b943349afa681af2058d7a419074ba72af4 100644 (file)
--- a/docs/ReleaseNotes.rst
+++ b/docs/ReleaseNotes.rst
@@ -90,6 +90,11 @@ in fairly early stages, but we expect successful compilation when:
 Some additional functionality is also implemented, notably DWARF debugging,
 GNU-style thread local storage and inline assembly.
 
+Hexagon Target
+--------------
+
+- Removed support for hexagonv2 and hexagonv3 processor architectures.
+
 Loop Vectorizer
 ---------------