#include "rga_mmu_info.h"\r
#include "RGA_API.h"\r
\r
-\r
#define RGA_TEST 0\r
#define RGA_TEST_TIME 0\r
#define RGA_TEST_FLUSH_TIME 0\r
#define PRE_SCALE_BUF_SIZE 2048*1024*4\r
\r
#define RGA_POWER_OFF_DELAY 4*HZ /* 4s */\r
-#define RGA_TIMEOUT_DELAY 2*HZ /* 2s */\r
+#define RGA_TIMEOUT_DELAY 1*HZ /* 1s */\r
\r
#define RGA_MAJOR 255\r
\r
ktime_t rga_start;\r
ktime_t rga_end;\r
\r
-int num = 0;\r
+int rga_num = 0;\r
\r
struct rga_drvdata {\r
struct miscdevice miscdev;\r
\r
ret_timeout = wait_event_interruptible_timeout(session->wait, atomic_read(&session->done), RGA_TIMEOUT_DELAY);\r
\r
- rga_soft_reset();\r
+ \r
\r
if (unlikely(ret_timeout < 0)) {\r
- pr_err("flush pid %d wait task ret %d\n", session->pid, ret);\r
- rga_del_running_list();\r
+ pr_err("flush pid %d wait task ret %d\n", session->pid, ret); \r
+ rga_soft_reset();\r
ret = -ETIMEDOUT;\r
} else if (0 == ret_timeout) {\r
pr_err("flush pid %d wait %d task done timeout\n", session->pid, atomic_read(&session->task_running));\r
- rga_del_running_list();\r
+ printk("bus = %.8x\n", rga_read(RGA_INT));\r
+ rga_soft_reset();\r
ret = -ETIMEDOUT;\r
}\r
\r
\r
static int rga_check_param(const struct rga_req *req)\r
{\r
- #if 1\r
/*RGA can support up to 8192*8192 resolution in RGB format,but we limit the image size to 8191*8191 here*/\r
//check src width and height\r
- if (unlikely((req->src.act_w < 0) || (req->src.act_w > 8191) || (req->src.act_h < 0) || (req->src.act_h > 8191))) {\r
- ERR("invalid source resolution\n");\r
+ if (unlikely((req->src.act_w <= 0) || (req->src.act_w > 8191) || (req->src.act_h <= 0) || (req->src.act_h > 8191))) {\r
+ ERR("invalid source resolution act_w = %d, act_h = %d\n", req->src.act_w, req->src.act_h);\r
return -EINVAL;\r
}\r
\r
//check dst width and height\r
- if (unlikely((req->dst.act_w < 0) || (req->dst.act_w > 2048) || (req->dst.act_h < 16) || (req->dst.act_h > 2048))) {\r
- ERR("invalid destination resolution\n");\r
+ if (unlikely((req->dst.act_w <= 0) || (req->dst.act_w > 2048) || (req->dst.act_h <= 0) || (req->dst.act_h > 2048))) {\r
+ ERR("invalid destination resolution act_w = %d, act_h = %d\n", req->dst.act_w, req->dst.act_h);\r
return -EINVAL;\r
}\r
\r
ERR("invalid dst_vir_w\n");\r
return -EINVAL;\r
}\r
-\r
- #endif\r
- \r
- \r
+ \r
return 0;\r
}\r
\r
}\r
}\r
\r
- RGA_gen_reg_info(req, (uint8_t *)reg->cmd_reg);\r
+ if(RGA_gen_reg_info(req, (uint8_t *)reg->cmd_reg) == -1)\r
+ {\r
+ printk("gen reg info error\n");\r
+ if(reg != NULL)\r
+ {\r
+ kfree(reg); \r
+ }\r
+ return NULL;\r
+ }\r
\r
spin_lock_irqsave(&rga_service.lock, flag);\r
list_add_tail(®->status_link, &rga_service.waiting);\r
static void rga_try_set_reg(uint32_t num)\r
{\r
unsigned long flag;\r
+ struct rga_reg *reg ;\r
\r
if (!num)\r
{\r
{\r
do\r
{ \r
- if((rga_read(RGA_STATUS) & 0x1)) \r
+ if(!list_empty(&rga_service.running)) \r
{ \r
break;\r
}\r
else \r
{ \r
- struct rga_reg *reg = list_entry(rga_service.waiting.next, struct rga_reg, status_link);\r
/* RGA is idle */\r
+ reg = list_entry(rga_service.waiting.next, struct rga_reg, status_link); \r
rga_soft_reset();\r
- rga_del_running_list();\r
+ //rga_del_running_list();\r
rga_copy_reg(reg, 0); \r
rga_reg_from_wait_to_run(reg);\r
\r
/* CMD buff */\r
rga_write(virt_to_phys(rga_service.cmd_buff) & (~PAGE_MASK), RGA_CMD_ADDR); \r
\r
- #if RGA_TEST\r
- {\r
- uint32_t i, *p;\r
- p = rga_service.cmd_buff;\r
- printk("CMD_REG\n"); \r
- for (i=0; i<7; i++) \r
- printk("%.8x %.8x %.8x %.8x\n", p[i*4+0], p[i*4+1], p[i*4+2], p[i*4+3]);\r
- }\r
- #endif\r
-\r
/* master mode */\r
rga_write(0x1<<2, RGA_SYS_CTRL);\r
\r
/* All CMD finish int */\r
- rga_write(0x1<<10, RGA_INT);\r
-\r
- #if 0\r
- {\r
- uint32_t i;\r
- for(i=0; i<28; i++)\r
- {\r
- rga_write(rga_service.cmd_buff[i], 0x100 + i*4);\r
- }\r
- }\r
- #endif\r
+ rga_write((0x1<<10)|(0x1<<8), RGA_INT);\r
\r
/* Start proc */\r
atomic_set(®->session->done, 0);\r
}\r
num--;\r
}\r
- while(num);\r
+ while(0);\r
}\r
spin_unlock_irqrestore(&rga_service.lock, flag);\r
+\r
+ \r
}\r
\r
\r
/* generate 2 cmd for pre scale */ \r
req2 = kmalloc(sizeof(struct rga_req), GFP_KERNEL);\r
if(NULL == req2) {\r
- return -EINVAL; \r
+ return -EFAULT; \r
}\r
\r
+ ret = RGA_gen_two_pro(req, req2); \r
+ if(ret == -EINVAL) {\r
+ break;\r
+ } \r
+\r
ret = rga_check_param(req);\r
if(ret == -EINVAL) {\r
+ printk("req 1 argument is inval\n");\r
break;\r
}\r
-\r
+ \r
ret = rga_check_param(req2);\r
if(ret == -EINVAL) {\r
+ printk("req 2 argument is inval\n");\r
break;\r
}\r
- \r
- RGA_gen_two_pro(req, req2);\r
\r
reg = rga_reg_init_2(session, req, req2);\r
if(reg == NULL) {\r
return 0; \r
}\r
while(0);\r
-\r
+ \r
if(NULL != req2)\r
{\r
kfree(req2);\r
ret = rga_blit(session, req);\r
\r
ret_timeout = wait_event_interruptible_timeout(session->wait, atomic_read(&session->done), RGA_TIMEOUT_DELAY);\r
-\r
- rga_soft_reset();\r
\r
if (unlikely(ret_timeout< 0)) \r
{\r
- pr_err("pid %d wait task ret %d\n", session->pid, ret_timeout);\r
- rga_del_running_list();\r
+ pr_err("sync pid %d wait task ret %d\n", session->pid, ret_timeout); \r
+ rga_soft_reset();\r
ret = -ETIMEDOUT;\r
} \r
else if (0 == ret_timeout)\r
{\r
- pr_err("pid %d wait %d task done timeout\n", session->pid, atomic_read(&session->task_running));\r
- rga_del_running_list();\r
+ pr_err("sync pid %d wait %d task done timeout\n", session->pid, atomic_read(&session->task_running));\r
+ rga_soft_reset();\r
ret = -ETIMEDOUT;\r
}\r
\r
#if RGA_TEST_TIME\r
rga_end = ktime_get();\r
rga_end = ktime_sub(rga_end, rga_start);\r
- printk("one cmd end time %d\n", (int)ktime_to_us(rga_end));\r
+ printk("sync one cmd end time %d\n", (int)ktime_to_us(rga_end));\r
#endif\r
\r
return ret; \r
atomic_set(&session->num_done, 0);\r
file->private_data = (void *)session;\r
\r
- DBG("*** rga opened by pid %d *** \n", session->pid); \r
- DBG("*** rga dev opened *** \n");\r
+ DBG("*** rga dev opened by pid %d *** \n", session->pid); \r
return nonseekable_open(inode, file);\r
\r
}\r
kfree(session);\r
spin_unlock_irqrestore(&rga_service.lock, flag);\r
\r
- pr_debug("dev closed\n");\r
+ DBG("*** rga dev close ***\n");\r
return 0;\r
}\r
\r
static irqreturn_t rga_irq(int irq, void *dev_id)\r
{\r
//struct rga_reg *reg;\r
- //uint32_t num = 0;\r
- struct list_head *next;\r
+ uint32_t flag;\r
+ uint32_t i = 0;\r
//int int_enable = 0;\r
\r
#if RGA_TEST\r
printk("rga_irq is valid\n");\r
#endif\r
\r
- /*clear INT */\r
- rga_write(rga_read(RGA_INT) | (0x1<<6), RGA_INT);\r
- rga_write(rga_read(RGA_INT) | (0x1<<7), RGA_INT);\r
-\r
- if(((rga_read(RGA_STATUS) & 0x1) != 0))// idle\r
+ if(rga_read(RGA_INT) & 0x1)\r
+ {\r
+ printk("bus Error interrupt is occur\n");\r
+ }\r
+ \r
+ while(((rga_read(RGA_STATUS) & 0x1) != 0) && (i<10))// idle\r
{ \r
- printk(" irq ERROR : RGA is not idle!\n");\r
- rga_soft_reset();\r
- }\r
-\r
- rga_soft_reset();\r
- \r
- spin_lock(&rga_service.lock);\r
+ mdelay(1);\r
+ i++;\r
+ } \r
\r
+ /*clear INT */\r
+ rga_write(rga_read(RGA_INT) | (0x1<<6) | (0x1<<7) | (0x1<<4), RGA_INT);\r
+ spin_lock_irqsave(&rga_service.lock, flag);\r
rga_del_running_list();\r
-\r
- atomic_set(&rga_service.cmd_num, 0);\r
-\r
- spin_unlock(&rga_service.lock);\r
-\r
- next = &rga_service.waiting;\r
-\r
- if(!list_empty(next))\r
+ spin_unlock_irqrestore(&rga_service.lock, flag);\r
+ \r
+ if(!list_empty(&rga_service.waiting))\r
{\r
rga_try_set_reg(1);\r
}\r
dmac_flush_range(&dst_buf[0], &dst_buf[800*480]);\r
outer_flush_range(virt_to_phys(&dst_buf[0]),virt_to_phys(&dst_buf[800*480]));\r
#endif\r
- \r
+ \r
req.src.act_w = 1024;\r
req.src.act_h = 1024;\r
\r
req.src.vir_w = 1024;\r
req.src.vir_h = 1024;\r
req.src.yrgb_addr = (uint32_t)virt_to_phys(src_buf);\r
- //req.src.uv_addr = (uint32_t)U4200_320_240_swap0;\r
+ req.src.uv_addr = req.src.yrgb_addr + 1920;\r
//req.src.v_addr = (uint32_t)V4200_320_240_swap0;\r
req.src.format = RK_FORMAT_RGBA_8888;\r
\r
\r
req.dst.vir_w = 1024;\r
req.dst.vir_h = 1024;\r
- req.dst.x_offset = 0;\r
- req.dst.y_offset = 000;\r
+ req.dst.x_offset = 1023;\r
+ req.dst.y_offset = 0;\r
req.dst.yrgb_addr = (uint32_t)virt_to_phys(dst);\r
\r
+ //req.dst.format = RK_FORMAT_RGB_565;\r
+\r
req.clip.xmin = 0;\r
req.clip.xmax = 1023;\r
req.clip.ymin = 0;\r
req.clip.ymax = 1023;\r
\r
//req.render_mode = color_fill_mode;\r
- req.fg_color = 0x80808080;\r
+ //req.fg_color = 0x80ffffff;\r
\r
- req.rotate_mode = 0;\r
+ req.rotate_mode = 1;\r
req.scale_mode = 0;\r
\r
- req.alpha_rop_flag = 0;\r
- req.alpha_global_value = 0x80;\r
+ req.alpha_rop_flag = 1;\r
+ req.alpha_rop_mode = 0x1;\r
\r
- req.sina = 0x00000;\r
- req.cosa = 0x10000;\r
+ req.sina = 65536;\r
+ req.cosa = 0;\r
\r
- req.mmu_info.mmu_flag = 0;\r
+ req.mmu_info.mmu_flag = 0x0;\r
req.mmu_info.mmu_en = 0;\r
\r
rga_blit_sync(&session, &req);\r
fb->var.green.msb_right = 0;\r
\r
fb->var.blue.length = 8;\r
-\r
-\r
-\r
\r
fb->var.blue.offset = 16;\r
fb->var.blue.msb_right = 0;\r