'nsec_ctx->mon_lr' is not the fiq break point's PC, because it will
be override as 'sip_fiq_debugger_uart_irq_tf_cb' for optee-os to
jump to fiq_debugger handler. As 'nsec_ctx->und_lr' is not used for
kernel, optee-os uses it to deliver fiq break point's PC.
Change-Id: I5a831638e8228766d03d92674e3e29facdd116f8
Signed-off-by: chenjh <chenjh@rock-chips.com>
fiq_pt_regs.ARM_ip = nsec_ctx->r12;
fiq_pt_regs.ARM_sp = nsec_ctx->svc_sp;
fiq_pt_regs.ARM_lr = nsec_ctx->svc_lr;
- fiq_pt_regs.ARM_pc = nsec_ctx->mon_lr;
fiq_pt_regs.ARM_cpsr = nsec_ctx->mon_spsr;
+
+ /*
+ * 'nsec_ctx->mon_lr' is not the fiq break point's PC, because it will
+ * be override as 'psci_fiq_debugger_uart_irq_tf_cb' for optee-os to
+ * jump to fiq_debugger handler.
+ *
+ * As 'nsec_ctx->und_lr' is not used for kernel, so optee-os uses it to
+ * deliver fiq break point's PC.
+ *
+ */
+ fiq_pt_regs.ARM_pc = nsec_ctx->und_lr;
#endif
return fiq_pt_regs;