pinctrl:add dts definition for nandc

diff --git a/arch/arm/boot/dts/rk3036-pinctrl.dtsi b/arch/arm/boot/dts/rk3036-pinctrl.dtsi
index 55249f0a73c8309b7da7fe80cb1575c77e935ab0..d5225b100b8a5e2dc39e615b080282909c228eed 100755 (executable)
--- a/arch/arm/boot/dts/rk3036-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rk3036-pinctrl.dtsi
@@ -415,6 +415,53 @@
 
                };
 
+               gpio1_nandc {
+                       nandc_ale:nandc-ale {
+                               rockchip,pins = <NAND_ALE>;
+                               rockchip,pull = <VALUE_PULL_DEFAULT>;
+                       };
+
+                       nandc_cle:nandc-cle {
+                               rockchip,pins = <NAND_CLE>;
+                               rockchip,pull = <VALUE_PULL_DEFAULT>;
+                       };
+
+                       nandc_wrn:nandc-wrn {
+                               rockchip,pins = <NAND_WRN>;
+                               rockchip,pull = <VALUE_PULL_DEFAULT>;
+                       };
+
+                       nandc_rdn:nandc-rdn {
+                               rockchip,pins = <NAND_RDN>;
+                               rockchip,pull = <VALUE_PULL_DEFAULT>;
+                       };
+
+                       nandc_rdy:nandc-rdy {
+                               rockchip,pins = <NAND_RDY>;
+                               rockchip,pull = <VALUE_PULL_DEFAULT>;
+                       };
+
+                       nandc_cs0:nandc-cs0 {
+                               rockchip,pins = <NAND_CS0>;
+                               rockchip,pull = <VALUE_PULL_DEFAULT>;
+                       };
+
+
+                       nandc_data: nandc-data {
+                               rockchip,pins = <NAND_D0>,
+                                               <NAND_D1>,
+                                               <NAND_D2>,
+                                               <NAND_D3>,
+                                               <NAND_D4>,
+                                               <NAND_D5>,
+                                               <NAND_D6>,
+                                               <NAND_D7>;
+                               rockchip,pull = <VALUE_PULL_DEFAULT>;   
+
+                       };
+
+               };
+
                gpio0_sdio0 {
                        sdio0_clk: sdio0_clk {
                                rockchip,pins = <MMC1_CLKOUT>;

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 851d2060bc20ef6e32ab44cef69a740fb6da6e2a..69bb9781e908cbdeb6e473dc8b43d824e35b7808 100755 (executable)
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -103,6 +103,8 @@
                compatible = "rockchip,rk-nandc";
                reg = <0x10500000 0x4000>;
                interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+               //pinctrl-names = "default";
+               //pinctrl-0 = <&nandc_ale &nandc_cle &nandc_wrn &nandc_rdn &nandc_rdy &nandc_cs0 &nandc_data>;
                nandc_id = <0>;
                clocks = <&clk_nandc>, <&clk_gates5 9>, <&clk_gates10 4>;
                clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";