rk3026: add more freq support

diff --git a/arch/arm/mach-rk3026/clock_data.c b/arch/arm/mach-rk3026/clock_data.c
index 4f63ff5feb9ad966e2ff05323942e0f835671ee4..7f712e85fe80e3a0b5a61ab996292517d150d929 100755 (executable)
--- a/arch/arm/mach-rk3026/clock_data.c
+++ b/arch/arm/mach-rk3026/clock_data.c
@@ -128,11 +128,32 @@ struct pll_clk_set {
 }
 
 static const struct apll_clk_set apll_clks[] = {
+       _APLL_SET_CLKS(1608, 1, 67, 1, 1, 1, 0, 81, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1584, 1, 66, 1, 1, 1, 0, 81, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1560, 1, 65, 1, 1, 1, 0, 81, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1536, 1, 64, 1, 1, 1, 0, 81, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1512, 1, 63, 1, 1, 1, 0, 81, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1488, 1, 62, 1, 1, 1, 0, 81, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1464, 1, 61, 1, 1, 1, 0, 81, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1440, 1, 60, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1416, 1, 59, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1392, 1, 58, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1368, 1, 57, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1344, 1, 56, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1320, 1, 55, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1296, 1, 54, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS(1272, 1, 53, 1, 1, 1, 0, 41, 21, 41, 21, 21),
        _APLL_SET_CLKS(1248, 1, 52, 1, 1, 1, 0, 41, 21, 41, 21, 21),
        _APLL_SET_CLKS(1200, 1, 50, 1, 1, 1, 0, 41, 21, 41, 21, 21),
        _APLL_SET_CLKS(1104, 1, 46, 1, 1, 1, 0, 41, 21, 41, 21, 21),
        _APLL_SET_CLKS(1008, 1, 42, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS( 984, 1, 41, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS( 960, 1, 40, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS( 936, 1, 39, 1, 1, 1, 0, 41, 21, 41, 21, 21),
        _APLL_SET_CLKS( 912, 1, 38, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS( 888, 1, 37, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS( 864, 1, 36, 1, 1, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS( 840, 1, 35, 1, 1, 1, 0, 41, 21, 41, 21, 21),
        _APLL_SET_CLKS( 816, 1, 34, 1, 1, 1, 0, 41, 21, 41, 21, 21),
        _APLL_SET_CLKS( 696, 1, 29, 1, 1, 1, 0, 41, 21, 41, 21, 21),
        _APLL_SET_CLKS( 600, 1, 25, 1, 1, 1, 0, 41, 21, 41, 21, 21),
@@ -140,6 +161,7 @@ static const struct apll_clk_set apll_clks[] = {
        _APLL_SET_CLKS( 408, 1, 17, 1, 1, 1, 0, 41, 21, 41, 21, 21),
        _APLL_SET_CLKS( 312, 1, 52, 2, 2, 1, 0, 41, 21, 41, 21, 21),
        _APLL_SET_CLKS( 216, 1, 36, 2, 2, 1, 0, 41, 21, 41, 21, 21),
+       _APLL_SET_CLKS( 96, 1, 32, 4, 2, 1, 0, 21, 21, 41, 21, 21),
        _APLL_SET_CLKS(   0, 1, 0, 1, 1, 1, 0, 41, 21, 41, 21, 21),
 };