[ARM] tegra: stingray: Samsung memory updates

Update the Samsung dvfs tables based on new measurements
from nVidia (Samsung_1GB_K4P4G154EC-FGC0_DVFS_table_K36).

Change-Id: I8659339a2c4d1306a1b9708e16617d0062dc8c40
Signed-off-by: James Wylder <james.wylder@motorola.com>

diff --git a/arch/arm/mach-tegra/board-stingray-memory.c b/arch/arm/mach-tegra/board-stingray-memory.c
index 0eb5c303a3a08c47643a746dccaedc66b05f9925..d163ecab95b959fa00cb959234e01e9bd6f8a7b7 100644 (file)
--- a/arch/arm/mach-tegra/board-stingray-memory.c
+++ b/arch/arm/mach-tegra/board-stingray-memory.c
@@ -21,12 +21,64 @@
 #include "board-stingray.h"
 #include "tegra2_emc.h"
 
+
 static const struct tegra_emc_table stingray_emc_tables_samsung[] = {
+       {
+               .rate = 25000,   /* SDRAM frequency */
+               .regs = {
+                       0x00000002,   /* RC */
+                       0x00000006,   /* RFC */
+                       0x00000003,   /* RAS */
+                       0x00000003,   /* RP */
+                       0x00000006,   /* R2W */
+                       0x00000004,   /* W2R */
+                       0x00000002,   /* R2P */
+                       0x00000009,   /* W2P */
+                       0x00000003,   /* RD_RCD */
+                       0x00000003,   /* WR_RCD */
+                       0x00000002,   /* RRD */
+                       0x00000002,   /* REXT */
+                       0x00000002,   /* WDV */
+                       0x00000004,   /* QUSE */
+                       0x00000003,   /* QRST */
+                       0x00000008,   /* QSAFE */
+                       0x0000000b,   /* RDV */
+                       0x0000004d,   /* REFRESH */
+                       0x00000000,   /* BURST_REFRESH_NUM */
+                       0x00000003,   /* PDEX2WR */
+                       0x00000003,   /* PDEX2RD */
+                       0x00000003,   /* PCHG2PDEN */
+                       0x00000008,   /* ACT2PDEN */
+                       0x00000001,   /* AR2PDEN */
+                       0x0000000a,   /* RW2PDEN */
+                       0x00000004,   /* TXSR */
+                       0x00000003,   /* TCKE */
+                       0x00000008,   /* TFAW */
+                       0x00000004,   /* TRPAB */
+                       0x00000006,   /* TCLKSTABLE */
+                       0x00000002,   /* TCLKSTOP */
+                       0x00000068,   /* TREFBW */
+                       0x00000003,   /* QUSE_EXTRA */
+                       0x00000003,   /* FBIO_CFG6 */
+                       0x00000000,   /* ODT_WRITE */
+                       0x00000000,   /* ODT_READ */
+                       0x00000082,   /* FBIO_CFG5 */
+                       0xa09404ae,   /* CFG_DIG_DLL */
+                       0x00070000,   /* DLL_XFORM_DQS */
+                       0x00000000,   /* DLL_XFORM_QUSE */
+                       0x00000000,   /* ZCAL_REF_CNT */
+                       0x00000003,   /* ZCAL_WAIT_CNT */
+                       0x00000000,   /* AUTO_CAL_INTERVAL */
+                       0x00000000,   /* CFG_CLKTRIM_0 */
+                       0x00000000,   /* CFG_CLKTRIM_1 */
+                       0x00000000,   /* CFG_CLKTRIM_2 */
+               }
+       },
        {
                .rate = 50000,   /* SDRAM frequency */
                .regs = {
-                       0x00000004,   /* RC */
-                       0x00000008,   /* RFC */
+                       0x00000003,   /* RC */
+                       0x00000007,   /* RFC */
                        0x00000003,   /* RAS */
                        0x00000003,   /* RP */
                        0x00000006,   /* R2W */
@@ -42,7 +94,7 @@ static const struct tegra_emc_table stingray_emc_tables_samsung[] = {
                        0x00000003,   /* QRST */
                        0x00000008,   /* QSAFE */
                        0x0000000b,   /* RDV */
-                       0x000000a8,   /* REFRESH */
+                       0x0000009f,   /* REFRESH */
                        0x00000000,   /* BURST_REFRESH_NUM */
                        0x00000003,   /* PDEX2WR */
                        0x00000003,   /* PDEX2RD */
@@ -50,20 +102,20 @@ static const struct tegra_emc_table stingray_emc_tables_samsung[] = {
                        0x00000008,   /* ACT2PDEN */
                        0x00000001,   /* AR2PDEN */
                        0x0000000a,   /* RW2PDEN */
-                       0x00000008,   /* TXSR */
+                       0x00000007,   /* TXSR */
                        0x00000003,   /* TCKE */
                        0x00000008,   /* TFAW */
                        0x00000004,   /* TRPAB */
                        0x00000006,   /* TCLKSTABLE */
                        0x00000002,   /* TCLKSTOP */
-                       0x000000e1,   /* TREFBW */
+                       0x000000d0,   /* TREFBW */
                        0x00000004,   /* QUSE_EXTRA */
                        0x00000000,   /* FBIO_CFG6 */
                        0x00000000,   /* ODT_WRITE */
                        0x00000000,   /* ODT_READ */
                        0x00000082,   /* FBIO_CFG5 */
                        0xa09404ae,   /* CFG_DIG_DLL */
-                       0x007fa010,   /* DLL_XFORM_DQS */
+                       0x00070000,   /* DLL_XFORM_DQS */
                        0x00000000,   /* DLL_XFORM_QUSE */
                        0x00000000,   /* ZCAL_REF_CNT */
                        0x00000005,   /* ZCAL_WAIT_CNT */
@@ -73,6 +125,57 @@ static const struct tegra_emc_table stingray_emc_tables_samsung[] = {
                        0x00000000,   /* CFG_CLKTRIM_2 */
                }
        },
+       {
+               .rate = 75000,   /* SDRAM frequency */
+               .regs = {
+                       0x00000005,   /* RC */
+                       0x0000000a,   /* RFC */
+                       0x00000004,   /* RAS */
+                       0x00000003,   /* RP */
+                       0x00000006,   /* R2W */
+                       0x00000004,   /* W2R */
+                       0x00000002,   /* R2P */
+                       0x00000009,   /* W2P */
+                       0x00000003,   /* RD_RCD */
+                       0x00000003,   /* WR_RCD */
+                       0x00000002,   /* RRD */
+                       0x00000002,   /* REXT */
+                       0x00000002,   /* WDV */
+                       0x00000005,   /* QUSE */
+                       0x00000003,   /* QRST */
+                       0x00000008,   /* QSAFE */
+                       0x0000000b,   /* RDV */
+                       0x000000ff,   /* REFRESH */
+                       0x00000000,   /* BURST_REFRESH_NUM */
+                       0x00000003,   /* PDEX2WR */
+                       0x00000003,   /* PDEX2RD */
+                       0x00000003,   /* PCHG2PDEN */
+                       0x00000008,   /* ACT2PDEN */
+                       0x00000001,   /* AR2PDEN */
+                       0x0000000a,   /* RW2PDEN */
+                       0x0000000b,   /* TXSR */
+                       0x00000003,   /* TCKE */
+                       0x00000008,   /* TFAW */
+                       0x00000004,   /* TRPAB */
+                       0x00000006,   /* TCLKSTABLE */
+                       0x00000002,   /* TCLKSTOP */
+                       0x00000138,   /* TREFBW */
+                       0x00000004,   /* QUSE_EXTRA */
+                       0x00000000,   /* FBIO_CFG6 */
+                       0x00000000,   /* ODT_WRITE */
+                       0x00000000,   /* ODT_READ */
+                       0x00000082,   /* FBIO_CFG5 */
+                       0xa09404ae,   /* CFG_DIG_DLL */
+                       0x00070000,   /* DLL_XFORM_DQS */
+                       0x00000000,   /* DLL_XFORM_QUSE */
+                       0x00000000,   /* ZCAL_REF_CNT */
+                       0x00000007,   /* ZCAL_WAIT_CNT */
+                       0x00000000,   /* AUTO_CAL_INTERVAL */
+                       0x00000000,   /* CFG_CLKTRIM_0 */
+                       0x00000000,   /* CFG_CLKTRIM_1 */
+                       0x00000000,   /* CFG_CLKTRIM_2 */
+               }
+       },
        {
                .rate = 150000,   /* SDRAM frequency */
                .regs = {
@@ -114,7 +217,7 @@ static const struct tegra_emc_table stingray_emc_tables_samsung[] = {
                        0x00000000,   /* ODT_READ */
                        0x00000082,   /* FBIO_CFG5 */
                        0xa06804ae,   /* CFG_DIG_DLL */
-                       0x007fe010,   /* DLL_XFORM_DQS */
+                       0x007e0010,   /* DLL_XFORM_DQS */
                        0x00000000,   /* DLL_XFORM_QUSE */
                        0x00000000,   /* ZCAL_REF_CNT */
                        0x0000000e,   /* ZCAL_WAIT_CNT */
@@ -164,8 +267,8 @@ static const struct tegra_emc_table stingray_emc_tables_samsung[] = {
                        0x00000000,   /* ODT_WRITE */
                        0x00000000,   /* ODT_READ */
                        0x00000282,   /* FBIO_CFG5 */
-                       0xe04c048b,   /* CFG_DIG_DLL */
-                       0x007fd010,   /* DLL_XFORM_DQS */
+                       0xe04e048b,   /* CFG_DIG_DLL */
+                       0x007e0010,   /* DLL_XFORM_DQS */
                        0x00000000,   /* DLL_XFORM_QUSE */
                        0x00000000,   /* ZCAL_REF_CNT */
                        0x0000001b,   /* ZCAL_WAIT_CNT */