clk: rockchip: rk3288: fix APLL 48M\126M setting

diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index df21324825eee1af1fe652cfb6948e54e9e11cd1..cceafebaa8887fc434e96bdf44553102e4830d6f 100644 (file)
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -145,8 +145,8 @@ static const struct apll_clk_set rk3288_apll_table[] = {
        _RK3288_APLL_SET_CLKS(312,      1,      52,     4,      2,      2,      4,      4,      4),
        _RK3288_APLL_SET_CLKS(252,      1,      84,     8,      2,      2,      4,      4,      4),
        _RK3288_APLL_SET_CLKS(216,      1,      72,     8,      2,      2,      4,      4,      4),
-       _RK3288_APLL_SET_CLKS(126,      1,      84,     16,     2,      2,      4,      4,      4),
-       _RK3288_APLL_SET_CLKS(48,       1,      32,     16,     2,      2,      4,      4,      4),
+       _RK3288_APLL_SET_CLKS(126,      2,      84,     8,      2,      2,      4,      4,      4),
+       _RK3288_APLL_SET_CLKS(48,       2,      32,     8,      2,      2,      4,      4,      4),
        _RK3288_APLL_SET_CLKS(0,        1,      32,     16,     2,      2,      4,      4,      4),
 };