MBB.addLiveIn(Reg);
// Insert the spill to the stack frame. The register is killed at the spill
- //
+ //
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
storeRegToStackSlot(MBB, MI, Reg, isKill,
CSI[i].getFrameIdx(), RC, TRI);
float Confidence) const {
if (!NumInstrs)
return false;
-
+
// Use old-style heuristics
if (OldARMIfCvt) {
if (Subtarget.getCPUString() == "generic")
return NumInstrs <= 3;
return NumInstrs <= 2;
}
-
+
// Attempt to estimate the relative costs of predication versus branching.
float UnpredCost = Probability * NumInstrs;
UnpredCost += 1.0; // The branch itself
UnpredCost += (1.0 - Confidence) * Subtarget.getMispredictionPenalty();
-
+
float PredCost = NumInstrs;
-
+
return PredCost < UnpredCost;
-
+
}
-
+
bool ARMBaseInstrInfo::
isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumT,
MachineBasicBlock &FMBB, unsigned NumF,
if (!NumT || !NumF)
return false;
-
+
// Attempt to estimate the relative costs of predication versus branching.
float UnpredCost = Probability * NumT + (1.0 - Probability) * NumF;
UnpredCost += 1.0; // The branch itself
UnpredCost += (1.0 - Confidence) * Subtarget.getMispredictionPenalty();
-
+
float PredCost = NumT + NumF;
-
+
return PredCost < UnpredCost;
}
} else {
// Assume the worst.
return NumRegs;
- }
+ }
}
}
}