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rk3066b: set 297MHz config to (2, 198, 8)
author
chenxing
<chenxing@rock-chips.com>
Thu, 29 Nov 2012 06:42:02 +0000
(14:42 +0800)
committer
chenxing
<chenxing@rock-chips.com>
Thu, 29 Nov 2012 06:42:02 +0000
(14:42 +0800)
arch/arm/mach-rk30/clock_data-rk3066b.c
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diff --git
a/arch/arm/mach-rk30/clock_data-rk3066b.c
b/arch/arm/mach-rk30/clock_data-rk3066b.c
index fa91dcfb6ba4eb39b114f71cd7cb111ef460d7ac..16d503cb2191b80273a20bb9b8e350f44313f413 100644
(file)
--- a/
arch/arm/mach-rk30/clock_data-rk3066b.c
+++ b/
arch/arm/mach-rk30/clock_data-rk3066b.c
@@
-1009,7
+1009,7
@@
static struct clk codec_pll_clk = {
static const struct pll_clk_set gpll_clks[] = {
_PLL_SET_CLKS(148500, 2, 99, 8),
- _PLL_SET_CLKS(297000, 2,
99, 4
),
+ _PLL_SET_CLKS(297000, 2,
198, 8
),
_PLL_SET_CLKS(300000, 1, 50, 4),
_PLL_SET_CLKS(594000, 2, 198, 4),
_PLL_SET_CLKS(1188000, 2, 99, 1),