Support targets that do not use i8 shift amounts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19707 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index a17caa1469a306674b433a24e01b5553cb307e27..3439249446e877a147b64256757be8979307f1fb 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -450,6 +450,10 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
 void SelectionDAGLowering::visitBinary(User &I, unsigned Opcode) {
   SDOperand Op1 = getValue(I.getOperand(0));
   SDOperand Op2 = getValue(I.getOperand(1));
+
+  if (isa<ShiftInst>(I))
+    Op2 = DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), Op2);
+
   setValue(&I, DAG.getNode(Opcode, Op1.getValueType(), Op1, Op2));
 }