Register FP regclasses

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76014 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SystemZ/SystemZISelLowering.cpp b/lib/Target/SystemZ/SystemZISelLowering.cpp
index ae1c8b72e42c03c04de1428538014b69a90b8add..364d6886559bd866f19d799cfca22dec2800bf3d 100644 (file)
--- a/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -32,6 +32,7 @@
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/Target/TargetOptions.h"
 #include "llvm/ADT/VectorExtras.h"
 using namespace llvm;
 
@@ -47,6 +48,11 @@ SystemZTargetLowering::SystemZTargetLowering(SystemZTargetMachine &tm) :
   addRegisterClass(MVT::i128, SystemZ::GR128RegisterClass);
   addRegisterClass(MVT::v2i64,SystemZ::GR128RegisterClass);
 
+  if (!UseSoftFloat) {
+    addRegisterClass(MVT::f32, SystemZ::FP32RegisterClass);
+    addRegisterClass(MVT::f64, SystemZ::FP64RegisterClass);
+  }
+
   // Compute derived properties from the register classes
   computeRegisterProperties();