*\r
*v0.0 : this driver is 2.6.32 kernel driver;\r
*v0.1 : this driver is 3.0.8 kernel driver;\r
-*v1.0 : 1.modify dma dirver;\r
+*v1.0 : 2012-08-09
+* 1.modify dma dirver;\r
* 2.enable Programmable THRE Interrupt Mode, so we can just judge ((up->iir & 0x0f) == 0x02) when transmit\r
* 3.reset uart and set it to loopback state to ensure setting baud rate sucessfully \r
+*v1.1 : 2012-08-23
+* 1. dma driver:make "when tx dma is only enable" work functionally
*/\r
-#define VERSION_AND_TIME "rk_serial.c v1.0 2012-08-09"\r
+#define VERSION_AND_TIME "rk_serial.c v1.1 2012-08-23"\r
\r
#define PORT_RK 90\r
#define UART_USR 0x1F /* UART Status Register */\r
DEBUG_INTR("error:lsr=0x%x\n", status);\r
}\r
}\r
+
+ if(!(up->dma->use_dma & RX_DMA)) {\r
+ if (status & (UART_LSR_DR | UART_LSR_BI)) {\r
+ receive_chars(up, &status);\r
+ }\r
+ }
\r
if ((up->iir & 0x0f) == 0x02) {\r
transmit_chars(up);\r
if (up->dma->use_dma) {\r
up->ier |= UART_IER_RLSI;\r
up->ier |= UART_IER_PTIME; //Programmable THRE Interrupt Mode Enable\r
- serial_rk_start_rx_dma(&up->port);\r
+ if (up->dma->use_dma & RX_DMA)
+ serial_rk_start_rx_dma(&up->port);
+ else
+ up->ier |= UART_IER_RDI;\r
} else\r
#endif\r
{\r
up->port.uartclk = clk_get_rate(up->clk);\r
\r
#if USE_DMA\r
- /* set dma config */\r
+ /* set dma config */
+ pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);\r
if(up->dma->use_dma & RX_DMA) {\r
pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);\r
//timer\r
dev_info(up->port.dev, "dmam_alloc_coherent dma_rx_buffer fail\n");\r
}\r
else {\r
- dev_info(up->port.dev, "dma_rx_buffer 0x%08x\n", (unsigned) up->dma->rx_buffer);\r
- dev_info(up->port.dev, "up 0x%08x\n", (unsigned)up->dma);\r
+ dev_info(up->port.dev, "dma_rx_buffer 0x%08x, phy:0x%08x\n", (unsigned) up->dma->rx_buffer, (unsigned)up->dma->rx_phy_addr);\r
+ //dev_info(up->port.dev, "up 0x%08x\n", (unsigned)up->dma);\r
}\r
\r
// work queue\r