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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33778 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/README.txt b/lib/Target/ARM/README.txt
index 000e8e6450a82d092340bf16d3dfb7928e8e891a..04bf9588ad42fdabb206270ab7ffad38ecaa7967 100644 (file)
--- a/lib/Target/ARM/README.txt
+++ b/lib/Target/ARM/README.txt
@@ -43,6 +43,20 @@ Among the obvious wins, doing so can eliminate the need to custom expand
 copysign (i.e. we won't need to custom expand it to get the conditional
 negate).
 
+This allows us to eliminate one instruction from:
+
+define i32 @_Z6slow4bii(i32 %x, i32 %y) {
+        %tmp = icmp sgt i32 %x, %y
+        %retval = select i1 %tmp, i32 %x, i32 %y
+        ret i32 %retval
+}
+
+__Z6slow4bii:
+        cmp r0, r1
+        movgt r1, r0
+        mov r0, r1
+        bx lr
+
 //===---------------------------------------------------------------------===//
 
 Implement long long "X-3" with instructions that fold the immediate in.  These