ARM: dts: rk3288: rename mipi to dsi
authorxubilv <xbl@rock-chips.com>
Thu, 13 Jul 2017 09:04:54 +0000 (17:04 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Wed, 19 Jul 2017 06:33:55 +0000 (14:33 +0800)
Change-Id: I35d348068df3720608fc9cd22f97be0264a03f67
Signed-off-by: xubilv <xbl@rock-chips.com>
arch/arm/boot/dts/rk3288-android.dtsi
arch/arm/boot/dts/rk3288-evb-android-rk818-mipi.dts
arch/arm/boot/dts/rk3288.dtsi

index 787368b32190d73a6116ae086f2b550b8227ccff..a8ebc9780e8188fbe7fd82bd94ac238af1173c2d 100644 (file)
                                connect = <&vopb_out_edp>;
                        };
 
-                       route_mipi: route-mipi {
+                       route_dsi0: route-dsi0 {
                                status = "disabled";
                                logo,uboot = "logo.bmp";
                                logo,kernel = "logo_kernel.bmp";
                                logo,mode = "center";
                                charge_logo,mode = "center";
-                               connect = <&vopb_out_mipi>;
+                               connect = <&vopb_out_dsi0>;
                        };
                };
        };
        status = "okay";
 };
 
-&mipi_dsi {
+&dsi0 {
        ports {
-               mipi_in: port {
-                       mipi_in_vopl: endpoint@1 {
+               dsi0_in: port {
+                       dsi0_in_vopl: endpoint@1 {
                                status = "disabled";
                        };
                };
index 24c916d0ff5c03e807b2ee18a39866900a93da3a..c5cb86ebb27c41ebe2fdbcb50245e8804c4e54b2 100644 (file)
        power-supply = <&vcc_lcd>;
 };
 
-&mipi_dsi {
+&dsi0 {
        status = "okay";
 
        panel: panel {
        };
 };
 
-&route_mipi {
+&route_dsi0 {
        status = "okay";
 };
 
index 9459928109326215b085e37c4f53f9a7b6f88271..200e988d1416dbfee3dc7f3bf10e67d704ac18fd 100644 (file)
                                remote-endpoint = <&edp_in_vopb>;
                        };
 
-                       vopb_out_mipi: endpoint@2 {
+                       vopb_out_dsi0: endpoint@2 {
                                reg = <2>;
-                               remote-endpoint = <&mipi_in_vopb>;
+                               remote-endpoint = <&dsi0_in_vopb>;
                        };
 
                        vopb_out_lvds: endpoint@3 {
                                remote-endpoint = <&edp_in_vopl>;
                        };
 
-                       vopl_out_mipi: endpoint@2 {
+                       vopl_out_dsi0: endpoint@2 {
                                reg = <2>;
-                               remote-endpoint = <&mipi_in_vopl>;
+                               remote-endpoint = <&dsi0_in_vopl>;
                        };
 
                        vopl_out_lvds: endpoint@3 {
                status = "disabled";
        };
 
-       mipi_dsi: mipi@ff960000 {
+       dsi0: dsi@ff960000 {
                compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
                reg = <0x0 0xff960000 0x0 0x4000>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
 
                ports {
-                       mipi_in: port {
+                       dsi0_in: port {
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               mipi_in_vopb: endpoint@0 {
+                               dsi0_in_vopb: endpoint@0 {
                                        reg = <0>;
-                                       remote-endpoint = <&vopb_out_mipi>;
+                                       remote-endpoint = <&vopb_out_dsi0>;
                                };
-                               mipi_in_vopl: endpoint@1 {
+                               dsi0_in_vopl: endpoint@1 {
                                        reg = <1>;
-                                       remote-endpoint = <&vopl_out_mipi>;
+                                       remote-endpoint = <&vopl_out_dsi0>;
                                };
                        };
                };