staging: comedi: ni_mio_common: tidy up the Digital I/O subdevice init
authorH Hartley Sweeten <hsweeten@visionengravers.com>
Mon, 14 Jul 2014 19:23:58 +0000 (12:23 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 16 Jul 2014 20:24:43 +0000 (13:24 -0700)
For aesthetics, add some whitespace to the Digital I/O subdevice init.

Only hook up the async command support if we have an irq.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/comedi/drivers/ni_mio_common.c

index 7146f21a619c312e7a83fc18b4837f05ea4696a6..dc5f927d32ff1c7e50970177db6644482b93fa3a 100644 (file)
@@ -5574,32 +5574,37 @@ static int ni_E_init(struct comedi_device *dev,
                s->type         = COMEDI_SUBD_UNUSED;
        }
 
-       /* digital i/o subdevice */
-
+       /* Digital I/O subdevice */
        s = &dev->subdevices[NI_DIO_SUBDEV];
-       s->type = COMEDI_SUBD_DIO;
-       s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
-       s->maxdata = 1;
-       s->io_bits = 0;         /* all bits input */
-       s->range_table = &range_digital;
-       s->n_chan = board->has_32dio_chan ? 32 : 8;
+       s->type         = COMEDI_SUBD_DIO;
+       s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
+       s->n_chan       = board->has_32dio_chan ? 32 : 8;
+       s->maxdata      = 1;
+       s->range_table  = &range_digital;
        if (devpriv->is_m_series) {
-               s->subdev_flags |=
-                   SDF_LSAMPL | SDF_CMD_WRITE /* | SDF_CMD_READ */;
-               s->insn_bits = &ni_m_series_dio_insn_bits;
-               s->insn_config = &ni_m_series_dio_insn_config;
-               s->do_cmd = &ni_cdio_cmd;
-               s->do_cmdtest = &ni_cdio_cmdtest;
-               s->cancel = &ni_cdio_cancel;
-               s->async_dma_dir = DMA_BIDIRECTIONAL;
-               s->len_chanlist = s->n_chan;
+               s->subdev_flags |= SDF_LSAMPL;
+               s->insn_bits    = ni_m_series_dio_insn_bits;
+               s->insn_config  = ni_m_series_dio_insn_config;
+               if (dev->irq) {
+                       s->subdev_flags |= SDF_CMD_WRITE /* | SDF_CMD_READ */;
+                       s->len_chanlist = s->n_chan;
+                       s->do_cmdtest   = ni_cdio_cmdtest;
+                       s->do_cmd       = ni_cdio_cmd;
+                       s->cancel       = ni_cdio_cancel;
+
+                       /* M-series boards use DMA */
+                       s->async_dma_dir = DMA_BIDIRECTIONAL;
+               }
 
+               /* reset DIO and set all channels to inputs */
                ni_writel(dev, CDO_Reset_Bit | CDI_Reset_Bit,
                          M_Offset_CDIO_Command);
                ni_writel(dev, s->io_bits, M_Offset_DIO_Direction);
        } else {
-               s->insn_bits = &ni_dio_insn_bits;
-               s->insn_config = &ni_dio_insn_config;
+               s->insn_bits    = ni_dio_insn_bits;
+               s->insn_config  = ni_dio_insn_config;
+
+               /* set all channels to inputs */
                devpriv->dio_control = DIO_Pins_Dir(s->io_bits);
                ni_writew(dev, devpriv->dio_control, DIO_Control_Register);
        }