ARM: sunxi: Add the Allwinner A31 compatible to the machine definition

The Allwinner A31 is a quad-Cortex-A7 based SoC, which shares a lot of
IPs with the previous SoCs from Allwinner, like the PIO, I2C, UARTs,
timers, watchdog IPs, but also differs by dropping the WEMAC ethernet
controller and most notably dropping the in-house IRQ controller in
favor of a ARM GIC one.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 5b045e302b4359d65b91ac31110dd566d2e10391..3ab2f65f8a50387d814b4eb4e810cac1bd681563 100644 (file)
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -10,3 +10,5 @@ config ARCH_SUNXI
        select SPARSE_IRQ
        select SUN4I_TIMER
        select PINCTRL_SUNXI
+       select ARM_GIC
+       select HAVE_SMP

diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index 38a3c55527c80da055bce73e1009219016fca1cf..11326d9f13da550ee8143bf20eb9e48fe0234f14 100644 (file)
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -96,6 +96,7 @@ static const char * const sunxi_board_dt_compat[] = {
        "allwinner,sun4i-a10",
        "allwinner,sun5i-a10s",
        "allwinner,sun5i-a13",
+       "allwinner,sun6i-a31",
        NULL,
 };