#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
-#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/ilist.h"
friend class MCAsmLayout;
public:
- typedef SetVector<MCSection *> SectionListType;
+ typedef std::vector<MCSection *> SectionListType;
typedef std::vector<const MCSymbol *> SymbolDataListType;
typedef pointee_iterator<SectionListType::const_iterator> const_iterator;
/// \name Backend Data Access
/// @{
- bool registerSection(MCSection &Section) { return Sections.insert(&Section); }
+ bool registerSection(MCSection &Section) {
+ if (Section.isRegistered())
+ return false;
+ Sections.push_back(&Section);
+ Section.setIsRegistered(true);
+ return true;
+ }
bool hasSymbolData(const MCSymbol &Symbol) const { return Symbol.hasData(); }
/// Whether this section has had instructions emitted into it.
unsigned HasInstructions : 1;
+ unsigned IsRegistered : 1;
+
FragmentListType Fragments;
/// Mapping from subsection number to insertion point for subsection numbers
bool hasInstructions() const { return HasInstructions; }
void setHasInstructions(bool Value) { HasInstructions = Value; }
+ bool isRegistered() const { return IsRegistered; }
+ void setIsRegistered(bool Value) { IsRegistered = Value; }
+
MCSection::FragmentListType &getFragmentList() { return Fragments; }
const MCSection::FragmentListType &getFragmentList() const {
return const_cast<MCSection *>(this)->getFragmentList();
uint64_t SectionDataSize = 0;
uint64_t SectionDataFileSize = 0;
uint64_t VMSize = 0;
- for (MCAssembler::const_iterator it = Asm.begin(),
- ie = Asm.end(); it != ie; ++it) {
- const MCSection &Sec = *it;
+ for (const MCSection &Sec : Asm) {
uint64_t Address = getSectionAddress(&Sec);
uint64_t Size = Layout.getSectionAddressSize(&Sec);
uint64_t FileSize = Layout.getSectionFileSize(&Sec);
VMSize = std::max(VMSize, Address + Size);
- if (it->isVirtualSection())
+ if (Sec.isVirtualSection())
continue;
SectionDataSize = std::max(SectionDataSize, Address + Size);
// ... and then the section headers.
uint64_t RelocTableEnd = SectionDataStart + SectionDataFileSize;
- for (MCAssembler::const_iterator it = Asm.begin(),
- ie = Asm.end(); it != ie; ++it) {
- std::vector<RelAndSymbol> &Relocs = Relocations[&*it];
+ for (const MCSection &Sec : Asm) {
+ std::vector<RelAndSymbol> &Relocs = Relocations[&Sec];
unsigned NumRelocs = Relocs.size();
- uint64_t SectionStart = SectionDataStart + getSectionAddress(&*it);
- WriteSection(Asm, Layout, *it, SectionStart, RelocTableEnd, NumRelocs);
+ uint64_t SectionStart = SectionDataStart + getSectionAddress(&Sec);
+ WriteSection(Asm, Layout, Sec, SectionStart, RelocTableEnd, NumRelocs);
RelocTableEnd += NumRelocs * sizeof(MachO::any_relocation_info);
}
}
// Write the actual section data.
- for (MCAssembler::const_iterator it = Asm.begin(),
- ie = Asm.end(); it != ie; ++it) {
- MCSection &Sec = *it;
+ for (const MCSection &Sec : Asm) {
Asm.writeSectionData(&Sec, Layout);
uint64_t Pad = getPaddingSize(&Sec, Layout);
WriteZeros(SectionDataPadding);
// Write the relocation entries.
- for (MCAssembler::const_iterator it = Asm.begin(),
- ie = Asm.end(); it != ie; ++it) {
+ for (const MCSection &Sec : Asm) {
// Write the section relocation entries, in reverse order to match 'as'
// (approximately, the exact algorithm is more complicated than this).
- std::vector<RelAndSymbol> &Relocs = Relocations[&*it];
+ std::vector<RelAndSymbol> &Relocs = Relocations[&Sec];
for (unsigned i = 0, e = Relocs.size(); i != e; ++i) {
Write32(Relocs[e - i - 1].MRE.r_word0);
Write32(Relocs[e - i - 1].MRE.r_word1);