usb: rk3036: updata soft-reset

1.rename platform dev name to 3036
2.fix dts err
3.follow new soft reset framework

diff --git a/arch/arm/boot/dts/rk3036-sdk.dts b/arch/arm/boot/dts/rk3036-sdk.dts
index a95b8a11d2b1b0edce4f75b2c71d553dc839edf2..9026144c24ec2b219ed276686db83d5a6796019d 100755 (executable)
--- a/arch/arm/boot/dts/rk3036-sdk.dts
+++ b/arch/arm/boot/dts/rk3036-sdk.dts
@@ -74,6 +74,14 @@
         status = "okay";
 
     };
+       usb_control {
+               compatible = "rockchip,rk3036-usb-control";
+               host_drv_gpio = <&gpio2 GPIO_C7 GPIO_ACTIVE_LOW>;
+               otg_drv_gpio = <&gpio0 GPIO_D2 GPIO_ACTIVE_LOW>;
+
+               rockchip,remote_wakeup;
+               rockchip,usb_irq_wakeup;
+       };
 };
 
 &nandc {

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index cf7f304c63cdcb5b572d50d9165c3a9b863b404b..fbb39e7b879480d4ecbbb914bc296dc98e399ebc 100755 (executable)
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -458,15 +458,15 @@
                                                  "Mali_PP0_MMU_IRQ";
          };
        dwc_control_usb: dwc-control-usb@20008000 {
-               compatible = "rockchip,rk3188-dwc-control-usb";
+               compatible = "rockchip,rk3036-dwc-control-usb";
                interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "otg_bvalid";
-               //gpios = <&gpio0 GPIO_C0 GPIO_ACTIVE_LOW>, <&gpio3 GPIO_D5 GPIO_ACTIVE_LOW>;
                clocks = <&clk_gates9 13>;
                clock-names = "hclk_usb_peri";
                rockchip,remote_wakeup;
                rockchip,usb_irq_wakeup;
-
+               resets = <&reset RK3036_RST_USBPOR>;
+               reset-names = "usbphy_por";
                usb_bc{
                        compatible = "rockchip,ctrl";
                        rk_usb,bvalid   = <0x14c 8 1>;
@@ -475,25 +475,31 @@
                        rk_usb,softctrl = <0x17c 0 1>;
                        rk_usb,opmode   = <0x17c 2 2>;
                        rk_usb,xcvrsel  = <0x17c 4 2>;
-                       rk_usb,termsel  = <0x118 6 1>; 
+                       rk_usb,termsel  = <0x17c 6 1>;
                };
        };
        usb0: usb@10180000 {
-               compatible = "rockchip,rk3188_usb20_otg";
+               compatible = "rockchip,rk3036_usb20_otg";
                reg = <0x10180000 0x40000>;
                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clk_gates1 5>, <&clk_gates5 13>;
                clock-names = "clk_usbphy0", "hclk_usb0";
+               resets = <&reset RK3036_RST_USBOTG0>, <&reset RK3036_RST_UTMI0>,
+                               <&reset RK3036_RST_OTGC0>;
+               reset-names = "otg_ahb", "otg_phy", "otg_controller";
                /*0 - Normal, 1 - Force Host, 2 - Force Device*/
                rockchip,usb-mode = <0>;
        };
 
        usb1: usb@101c0000 {
-               compatible = "rockchip,rk3188_usb20_host";
+               compatible = "rockchip,rk3036_usb20_host";
                reg = <0x101c0000 0x40000>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clk_gates1 6>, <&clk_gates7 3>;
                clock-names = "clk_usbphy1", "hclk_usb1";
+               resets = <&reset RK3036_RST_USBOTG1>, <&reset RK3036_RST_UTMI1>,
+                               <&reset RK3036_RST_OTGC1>;
+               reset-names = "host_ahb", "host_phy", "host_controller";
        };
        
        fb: fb{

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_driver.c b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
index 9a60c23f9b71b377ffe06f604cdf4943540ae0c6..96671ef802a8e8168695c84f67e0493bf2e9d734 100755 (executable)
--- a/drivers/usb/dwc_otg_310/dwc_otg_driver.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
@@ -105,7 +105,7 @@ static struct usb20host_pdata_id usb20host_pdata[] = {
         .pdata = &usb20host_pdata_rk3288,
         },
        {
-        .name = "rk3288-usb20host",
+        .name = "rk3036-usb20host",
         .pdata = &usb20host_pdata_rk3036,
         },
        {},

diff --git a/drivers/usb/dwc_otg_310/usbdev_rk3036.c b/drivers/usb/dwc_otg_310/usbdev_rk3036.c
index d94e8d2611b61951b8031662f71a0f20112b84f8..a8186c15d99f824bf4817cbaf5bce84031fc63f3 100755 (executable)
--- a/drivers/usb/dwc_otg_310/usbdev_rk3036.c
+++ b/drivers/usb/dwc_otg_310/usbdev_rk3036.c
@@ -31,71 +31,45 @@ static void usb20otg_phy_suspend(void *pdata, int suspend)
        }
 }
 
-static void usb20otg_soft_reset(void)
+static void usb20otg_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
 {
-       writel(UOC_HIWORD_UPDATE(0x1, 0x3, 0),
-              RK_GRF_VIRT + RK3036_GRF_UOC0_CON5);
-       writel(UOC_HIWORD_UPDATE(0x1, 0x3, 0),
-              RK_GRF_VIRT + RK3036_GRF_UOC1_CON5);
-       /* cru_set_soft_reset(SOFT_RST_USBPOR, true); */
-       writel(UOC_HIWORD_UPDATE(0x1, 0x1, 9),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST6_CON);
-       /* cru_set_soft_reset(SOFT_RST_UTMI0, true); */
-       writel(UOC_HIWORD_UPDATE(0x1, 0x1, 7),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST6_CON);
-       /* cru_set_soft_reset(SOFT_RST_UTMI1, true); */
-       writel(UOC_HIWORD_UPDATE(0x1, 0x1, 8),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST6_CON);
-
-       udelay(15);
-
-       writel(UOC_HIWORD_UPDATE(0x2, 0x3, 0),
-              RK_GRF_VIRT + RK3036_GRF_UOC0_CON5);
-       writel(UOC_HIWORD_UPDATE(0x2, 0x3, 0),
-              RK_GRF_VIRT + RK3036_GRF_UOC1_CON5);
-
-       udelay(1500);
-       /* cru_set_soft_reset(SOFT_RST_USBPOR, false); */
-       writel(UOC_HIWORD_UPDATE(0x0, 0x1, 9),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST6_CON);
-       udelay(2);
-       /* cru_set_soft_reset(SOFT_RST_UTMI0, false); */
-       writel(UOC_HIWORD_UPDATE(0x0, 0x1, 7),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST6_CON);
-       /* cru_set_soft_reset(SOFT_RST_UTMI1, false); */
-       writel(UOC_HIWORD_UPDATE(0x0, 0x1, 8),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST6_CON);
-
-       /* ctrler reset */
-       /* cru_set_soft_reset(SOFT_RST_OTGC0, true); */
-       writel(UOC_HIWORD_UPDATE(0x1, 0x1, 7),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST4_CON);
-       /* cru_set_soft_reset(SOFT_RST_OTGC1, true); */
-       writel(UOC_HIWORD_UPDATE(0x1, 0x1, 10),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST4_CON);
-       udelay(2);
-
-       /* cru_set_soft_reset(SOFT_RST_USBOTG0, true); */
-       writel(UOC_HIWORD_UPDATE(0x1, 0x1, 5),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST4_CON);
-       /* cru_set_soft_reset(SOFT_RST_USBOTG1, true); */
-       writel(UOC_HIWORD_UPDATE(0x1, 0x1, 8),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST4_CON);
-       udelay(2);
-       /*
-          cru_set_soft_reset(SOFT_RST_OTGC0,false);
-          cru_set_soft_reset(SOFT_RST_OTGC1,false);
-          ru_set_soft_reset(SOFT_RST_USBOTG0,false);
-          cru_set_soft_reset(SOFT_RST_USBOTG1,false);
-        */
-       writel(UOC_HIWORD_UPDATE(0x0, 0x1, 7),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST4_CON);
-       writel(UOC_HIWORD_UPDATE(0x0, 0x1, 10),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST4_CON);
-       writel(UOC_HIWORD_UPDATE(0x0, 0x1, 5),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST4_CON);
-       writel(UOC_HIWORD_UPDATE(0x0, 0x1, 8),
-              RK_CRU_VIRT + RK3036_CRU_SOFTRST4_CON);
+       struct dwc_otg_platform_data *usbpdata = pdata;
+       struct reset_control *rst_otg_h, *rst_otg_p, *rst_otg_c;
+
+       rst_otg_h = devm_reset_control_get(usbpdata->dev, "otg_ahb");
+       rst_otg_p = devm_reset_control_get(usbpdata->dev, "otg_phy");
+       rst_otg_c = devm_reset_control_get(usbpdata->dev, "otg_controller");
+       if (IS_ERR(rst_otg_h) || IS_ERR(rst_otg_p) || IS_ERR(rst_otg_c)) {
+               dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
+               return;
+       }
+
+       switch(rst_type) {
+       case RST_POR:
+               /* PHY reset */
+               writel(UOC_HIWORD_UPDATE(0x1, 0x3, 0),
+                          RK_GRF_VIRT + RK3036_GRF_UOC0_CON5);
+               reset_control_assert(rst_otg_p);
+               udelay(15);
+               writel(UOC_HIWORD_UPDATE(0x2, 0x3, 0),
+                          RK_GRF_VIRT + RK3036_GRF_UOC0_CON5);
+               udelay(1500);
+               reset_control_deassert(rst_otg_p);
+               udelay(2);
+
+               /* Controller reset */
+               reset_control_assert(rst_otg_c);
+               reset_control_assert(rst_otg_h);
+
+               udelay(2);
+
+               reset_control_deassert(rst_otg_c);
+               reset_control_deassert(rst_otg_h);
+               break;
+
+       default:
+               break;
+       }
 }
 
 static void usb20otg_clock_init(void *pdata)
@@ -240,9 +214,45 @@ static void usb20host_phy_suspend(void *pdata, int suspend)
        }
 }
 
-static void usb20host_soft_reset(void)
+static void usb20host_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
 {
-       ;
+       struct dwc_otg_platform_data *usbpdata = pdata;
+       struct reset_control *rst_host_h, *rst_host_p, *rst_host_c;
+
+       rst_host_h = devm_reset_control_get(usbpdata->dev, "host_ahb");
+       rst_host_p = devm_reset_control_get(usbpdata->dev, "host_phy");
+       rst_host_c = devm_reset_control_get(usbpdata->dev, "host_controller");
+       if (IS_ERR(rst_host_h) || IS_ERR(rst_host_p) || IS_ERR(rst_host_c)) {
+               dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
+               return;
+       }
+
+       switch(rst_type) {
+       case RST_POR:
+               /* PHY reset */
+               writel(UOC_HIWORD_UPDATE(0x1, 0x3, 0),
+                          RK_GRF_VIRT + RK3036_GRF_UOC1_CON5);
+               reset_control_assert(rst_host_p);
+               udelay(15);
+               writel(UOC_HIWORD_UPDATE(0x2, 0x3, 0),
+                          RK_GRF_VIRT + RK3036_GRF_UOC1_CON5);
+
+               udelay(1500);
+               reset_control_deassert(rst_host_p);
+
+               /* Controller reset */
+               reset_control_assert(rst_host_c);
+               reset_control_assert(rst_host_h);
+
+               udelay(5);
+
+               reset_control_deassert(rst_host_c);
+               reset_control_deassert(rst_host_h);
+               break;
+
+       default:
+               break;
+       }
 }
 
 static void usb20host_clock_init(void *pdata)