#define KBASE_VE_MEMORY_PER_PROCESS_LIMIT (512 * 1024 * 1024UL) /* 512MB */
#define KBASE_VE_MEMORY_OS_SHARED_MAX (2048 * 1024 * 1024UL) /* 768MB */
#define KBASE_VE_MEMORY_OS_SHARED_PERF_GPU KBASE_MEM_PERF_FAST/*KBASE_MEM_PERF_SLOW*/
-#define KBASE_VE_GPU_FREQ_KHZ_MAX 400000
+#define KBASE_VE_GPU_FREQ_KHZ_MAX 600000
#define KBASE_VE_GPU_FREQ_KHZ_MIN 100000
#ifdef CONFIG_UMP
#define KBASE_VE_UMP_DEVICE UMP_DEVICE_Z_SHIFT
/* Please keep table config_attributes in sync with config_attributes_hw_issue_8408 */
static kbase_attribute config_attributes[] = {
+#if 0
{
KBASE_CONFIG_ATTR_MEMORY_PER_PROCESS_LIMIT,
KBASE_VE_MEMORY_PER_PROCESS_LIMIT},
+#endif
#ifdef CONFIG_UMP
{
KBASE_CONFIG_ATTR_UMP_DEVICE,
KBASE_CONFIG_ATTR_POWER_MANAGEMENT_CALLBACKS,
(uintptr_t)&pm_callbacks},
#endif
-
+#if 0
{
KBASE_CONFIG_ATTR_MEMORY_OS_SHARED_MAX,
KBASE_VE_MEMORY_OS_SHARED_MAX},
-
+#endif
+#if 0
{
KBASE_CONFIG_ATTR_MEMORY_OS_SHARED_PERF_GPU,
KBASE_VE_MEMORY_OS_SHARED_PERF_GPU},
-
+#endif
{
KBASE_CONFIG_ATTR_PLATFORM_FUNCS,
(uintptr_t) &platform_funcs},
KBASE_VE_JS_RESET_TICKS_NSS_DEBUG},
#else /* CONFIG_MALI_DEBUG */
/* In release builds same as the defaults but scaled for 5MHz FPGA */
+#if 0
{
KBASE_CONFIG_ATTR_JS_SCHEDULING_TICK_NS,
KBASE_VE_JS_SCHEDULING_TICK_NS},
-
+#endif
+#if 0
{
KBASE_CONFIG_ATTR_JS_SOFT_STOP_TICKS,
KBASE_VE_JS_SOFT_STOP_TICKS},
-
+#endif
+#if 0
{
KBASE_CONFIG_ATTR_JS_HARD_STOP_TICKS_SS,
KBASE_VE_JS_HARD_STOP_TICKS_SS},
-
+#endif
+#if 0
{
KBASE_CONFIG_ATTR_JS_HARD_STOP_TICKS_NSS,
KBASE_VE_JS_HARD_STOP_TICKS_NSS},
-
+#endif
+#if 0
{
KBASE_CONFIG_ATTR_JS_RESET_TICKS_SS,
KBASE_VE_JS_RESET_TICKS_SS},
-
+#endif
+#if 0
{
KBASE_CONFIG_ATTR_JS_RESET_TICKS_NSS,
KBASE_VE_JS_RESET_TICKS_NSS},
+#endif
#endif /* CONFIG_MALI_DEBUG */
+#if 0
{
KBASE_CONFIG_ATTR_JS_RESET_TIMEOUT_MS,
KBASE_VE_JS_RESET_TIMEOUT_MS},
-
+#endif
+#if 0
{
KBASE_CONFIG_ATTR_JS_CTX_TIMESLICE_NS,
KBASE_VE_JS_CTX_TIMESLICE_NS},
-
+#endif
+#if 0
{
KBASE_CONFIG_ATTR_CPU_SPEED_FUNC,
KBASE_VE_CPU_SPEED_FUNC},
-
+#endif
+#if 0
{
KBASE_CONFIG_ATTR_SECURE_BUT_LOSS_OF_PERFORMANCE,
KBASE_VE_SECURE_BUT_LOSS_OF_PERFORMANCE},
-
+#endif
+#if 0
{
KBASE_CONFIG_ATTR_GPU_IRQ_THROTTLE_TIME_US,
20},
-
+#endif
{
KBASE_CONFIG_ATTR_END,
0}
} mali_dvfs_info;
static mali_dvfs_info mali_dvfs_infotbl[] = {
- {925000, 100, 0, 70, 0},
- {925000, 160, 50, 65, 0},
- {1025000, 266, 60, 78, 0},
- {1075000, 350, 70, 80, 0},
- {1125000, 400, 70, 80, 0},
- {1150000, 450, 76, 99, 0},
- {1200000, 533, 99, 100, 0},
+ {925000, 100, 0, 70, 0},
+ {925000, 160, 50, 65, 0},
+ {1025000, 266, 60, 78, 0},
+ {1075000, 350, 65, 75, 0},
+ {1125000, 400, 70, 75, 0},
+ {1200000, 600, 90, 100, 0},
};
#define MALI_DVFS_STEP ARRAY_SIZE(mali_dvfs_infotbl)
spin_lock_irqsave(&mali_dvfs_spinlock, flags);
if (dvfs_status->utilisation > mali_dvfs_infotbl[dvfs_status->step].max_threshold)
{
+ #if 0
if (dvfs_status->step==kbase_platform_dvfs_get_level(450))
{
if (platform->utilisation > mali_dvfs_infotbl[dvfs_status->step].max_threshold)
dvfs_status->step++;
BUG_ON(dvfs_status->step >= MALI_DVFS_STEP);
}
+ #endif
+ dvfs_status->step++;
+ BUG_ON(dvfs_status->step >= MALI_DVFS_STEP);
+
}
- else if((dvfs_status->step > 0) && (platform->time_tick == MALI_DVFS_TIME_INTERVAL) && (platform->utilisation < mali_dvfs_infotbl[dvfs_status->step].min_threshold))
+ else if((dvfs_status->step > 0) && (dvfs_status->utilisation < mali_dvfs_infotbl[dvfs_status->step].min_threshold))
+ //else if((dvfs_status->step > 0) && (platform->time_tick == MALI_DVFS_TIME_INTERVAL) && (platform->utilisation < mali_dvfs_infotbl[dvfs_status->step].min_threshold))
{
BUG_ON(dvfs_status->step <= 0);
dvfs_status->step--;
if (NULL == platform)
panic("oops");
- if (platform->clk_mali == 0)
+ if (!platform->mali_clk_node)
+ {
+ printk("mali_clk_node not init\n");
return;
-
+ }
switch (freq) {
- case 533:
- aclk_400_rate = 533000000;
- break;
- case 450:
- aclk_400_rate = 450000000;
+ case 600:
+ aclk_400_rate = 600000000;
break;
case 400:
aclk_400_rate = 400000000;
aclk_400_rate = 350000000;
break;
case 266:
- aclk_400_rate = 267000000;
+ aclk_400_rate = 266000000;
break;
case 160:
aclk_400_rate = 160000000;
#define KBASE_PM_DVFS_FREQUENCY 100
#define MALI_DVFS_KEEP_STAY_CNT 10
-#define MALI_DVFS_TIME_INTERVAL 5
+#define MALI_DVFS_TIME_INTERVAL 2
#define MALI_DVFS_CURRENT_FREQ 0
-#define MALI_DVFS_BL_CONFIG_FREQ 533
-#define MALI_DVFS_START_FREQ 450
+#define MALI_DVFS_BL_CONFIG_FREQ 600
+#define MALI_DVFS_START_FREQ 400
#ifdef CONFIG_MALI_T6XX_DVFS
#define CONFIG_MALI_T6XX_FREQ_LOCK
if(IS_ERR_OR_NULL(platform->mali_pd_node))
{
platform->mali_pd_node = NULL;
- printk(KERN_ERR "%s, %s(): failed to clk_get [platform->mali_pd_node]\n", __FILE__, __func__);
+ printk(KERN_ERR "%s, %s(): failed to get [platform->mali_pd_node]\n", __FILE__, __func__);
//goto out;
}
else
if (IS_ERR_OR_NULL(platform->mali_clk_node))
{
platform->mali_clk_node = NULL;
- printk(KERN_ERR "%s, %s(): failed to clk_get [platform->mali_clk_node]\n", __FILE__, __func__);
- //goto out;
+ printk(KERN_ERR "%s, %s(): failed to get [platform->mali_clk_node]\n", __FILE__, __func__);
+ goto out;
}
else
{
if (!platform)
return -ENODEV;
- if (!platform->clk_mali)
+ if (!platform->mali_clk_node)
+ {
+ printk("mali_clk_node not init\n");
return -ENODEV;
-
+ }
clkrate = dvfs_clk_get_rate(platform->mali_clk_node);
ret += snprintf(buf + ret, PAGE_SIZE - ret, "Current clk mali = %dMhz", clkrate / 1000000);
/* To be revised */
- ret += snprintf(buf + ret, PAGE_SIZE - ret, "\nPossible settings : 533, 450, 400, 350, 266, 160, 100Mhz");
+ ret += snprintf(buf + ret, PAGE_SIZE - ret, "\nPossible settings : 600, 400, 350, 266, 160, 100Mhz");
if (ret < PAGE_SIZE - 1)
ret += snprintf(buf + ret, PAGE_SIZE - ret, "\n");
if (!platform->mali_clk_node)
return -ENODEV;
- if (sysfs_streq("533", buf)) {
- freq = 533;
- } else if (sysfs_streq("450", buf)) {
- freq = 450;
+ if (sysfs_streq("600", buf)) {
+ freq = 600;
} else if (sysfs_streq("400", buf)) {
freq = 400;
} else if (sysfs_streq("350", buf)) {
ret += snprintf(buf + ret, PAGE_SIZE - ret, "Current Upper Lock Level = %dMhz", locked_level);
else
ret += snprintf(buf + ret, PAGE_SIZE - ret, "Unset the Upper Lock Level");
- ret += snprintf(buf + ret, PAGE_SIZE - ret, "\nPossible settings : 450, 400, 266, 160, 100, If you want to unlock : 533 or off");
+ ret += snprintf(buf + ret, PAGE_SIZE - ret, "\nPossible settings : 400, 350,266, 160, 100, If you want to unlock : 600 or off");
#else
ret += snprintf(buf + ret, PAGE_SIZE - ret, "mali DVFS is disabled. You can not set");
#ifdef CONFIG_MALI_T6XX_DVFS
if (sysfs_streq("off", buf)) {
mali_dvfs_freq_unlock();
- } else if (sysfs_streq("533", buf)) {
+ } else if (sysfs_streq("600", buf)) {
mali_dvfs_freq_unlock();
- } else if (sysfs_streq("450", buf)) {
- mali_dvfs_freq_lock(5);
} else if (sysfs_streq("400", buf)) {
mali_dvfs_freq_lock(4);
} else if (sysfs_streq("350", buf)) {
mali_dvfs_freq_lock(0);
} else {
dev_err(dev, "set_clock: invalid value\n");
- dev_err(dev, "Possible settings : 450, 400, 266, 160, 100, If you want to unlock : 533\n");
+ dev_err(dev, "Possible settings : 400, 350,266, 160, 100, If you want to unlock : 600\n");
return -ENOENT;
}
#else /* CONFIG_MALI_T6XX_DVFS */
ret += snprintf(buf + ret, PAGE_SIZE - ret, "Current Under Lock Level = %dMhz", locked_level);
else
ret += snprintf(buf + ret, PAGE_SIZE - ret, "Unset the Under Lock Level");
- ret += snprintf(buf + ret, PAGE_SIZE - ret, "\nPossible settings : 533, 450, 400, 266, 160, If you want to unlock : 100 or off");
+ ret += snprintf(buf + ret, PAGE_SIZE - ret, "\nPossible settings : 600, 400, 350,266, 160, If you want to unlock : 100 or off");
#else
ret += snprintf(buf + ret, PAGE_SIZE - ret, "mali DVFS is disabled. You can not set");
#ifdef CONFIG_MALI_T6XX_DVFS
if (sysfs_streq("off", buf)) {
mali_dvfs_freq_under_unlock();
- } else if (sysfs_streq("533", buf)) {
- mali_dvfs_freq_under_lock(6);
- } else if (sysfs_streq("450", buf)) {
+ } else if (sysfs_streq("600", buf)) {
mali_dvfs_freq_under_lock(5);
} else if (sysfs_streq("400", buf)) {
mali_dvfs_freq_under_lock(4);