[ARM] tegra: stingray: Add hsuarts
authorColin Cross <ccross@android.com>
Fri, 4 Jun 2010 00:52:02 +0000 (17:52 -0700)
committerColin Cross <ccross@android.com>
Wed, 6 Oct 2010 23:33:04 +0000 (16:33 -0700)
Change-Id: I70d0ee59b262915379dcfda208f5ec8be3dab702
Signed-off-by: Colin Cross <ccross@android.com>
arch/arm/mach-tegra/board-stingray-pinmux.c
arch/arm/mach-tegra/board-stingray.c

index 16fca4503439f4a687995c91c41f6af7a503bf10..7c8c1c6be5eeabc23ff5feb3c0231fd28375fe12 100644 (file)
@@ -54,8 +54,8 @@ static __initdata struct tegra_pingroup_config stingray_pinmux[] = {
        {TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_I2CP,  TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
-       {TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
-       {TEGRA_PINGROUP_IRTX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_IRTX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_KBCA,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_KBCB,  TEGRA_MUX_SDIO2,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_KBCC,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
@@ -109,7 +109,7 @@ static __initdata struct tegra_pingroup_config stingray_pinmux[] = {
        {TEGRA_PINGROUP_SDB,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SDC,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SDD,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
-       {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_UARTE,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_UARTE,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SPI4,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SPI4,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
@@ -128,8 +128,8 @@ static __initdata struct tegra_pingroup_config stingray_pinmux[] = {
        {TEGRA_PINGROUP_UAB,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_UAC,   TEGRA_MUX_OWR,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_UAD,   TEGRA_MUX_IRDA,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
-       {TEGRA_PINGROUP_UCA,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
-       {TEGRA_PINGROUP_UCB,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_UCA,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_UCB,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_UDA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_CK32,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_DDRC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
index a7300ded517c81d4698af77742dbf1bba5266849..a248da7eb5feabb4a4732a36207eb5b9bd3bc948 100644 (file)
@@ -93,7 +93,45 @@ static struct platform_device debug_uart = {
        },
 };
 
-static struct plat_serial8250_port hsuart_platform_data[] = {
+static struct plat_serial8250_port hs_uarta_platform_data[] = {
+       {
+               .mapbase        = TEGRA_UARTA_BASE,
+               .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
+               .irq            = INT_UARTA,
+       }, {
+               .flags          = 0
+       }
+};
+
+static struct platform_device hs_uarta = {
+       .name = "tegra_uart",
+       .id = 0,
+       .dev = {
+               .platform_data = hs_uarta_platform_data,
+               .coherent_dma_mask = 0xffffffff,
+       },
+};
+
+static struct plat_serial8250_port hs_uartc_platform_data[] = {
+       {
+               .mapbase        = TEGRA_UARTC_BASE,
+               .membase        = IO_ADDRESS(TEGRA_UARTC_BASE),
+               .irq            = INT_UARTC,
+       }, {
+               .flags          = 0
+       }
+};
+
+static struct platform_device hs_uartc = {
+       .name = "tegra_uart",
+       .id = 2,
+       .dev = {
+               .platform_data = hs_uartc_platform_data,
+               .coherent_dma_mask = 0xffffffff,
+       },
+};
+
+static struct plat_serial8250_port hs_uartd_platform_data[] = {
        {
                .mapbase        = TEGRA_UARTD_BASE,
                .membase        = IO_ADDRESS(TEGRA_UARTD_BASE),
@@ -103,11 +141,30 @@ static struct plat_serial8250_port hsuart_platform_data[] = {
        }
 };
 
-static struct platform_device hsuart = {
+static struct platform_device hs_uartd = {
        .name = "tegra_uart",
        .id = 3,
        .dev = {
-               .platform_data = hsuart_platform_data,
+               .platform_data = hs_uartd_platform_data,
+               .coherent_dma_mask = 0xffffffff,
+       },
+};
+
+static struct plat_serial8250_port hs_uarte_platform_data[] = {
+       {
+               .mapbase        = TEGRA_UARTE_BASE,
+               .membase        = IO_ADDRESS(TEGRA_UARTE_BASE),
+               .irq            = INT_UARTE,
+       }, {
+               .flags          = 0
+       }
+};
+
+static struct platform_device hs_uarte = {
+       .name = "tegra_uart",
+       .id = 4,
+       .dev = {
+               .platform_data = hs_uarte_platform_data,
                .coherent_dma_mask = 0xffffffff,
        },
 };
@@ -233,7 +290,10 @@ static struct platform_device *stingray_devices[] __initdata = {
        &tegra_otg,
        &androidusb_device,
        &bq24617_device,
-       &hsuart,
+       &hs_uarta,
+       &hs_uartc,
+       &hs_uartd,
+       &hs_uarte,
        &tegra_i2c_device1,
        &tegra_i2c_device2,
        &tegra_i2c_device3,