powerpc/86xx: Correct reading of information presented in cpuinfo

/proc/cpuinfo should be showing the boards revision and the revision of
the FPGA fitted. The functions currently used to access this information
as incorrect.

Additionally the VME geographical address of the PPC9A and it's status as
system contoller are available in the board registers. Show these in
cpuinfo.

Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
index 2efa052975e61716935c208b440890b19c860015..287f7bd17dd9027067dfdcd96dd26f48a269bbb8 100644 (file)
--- a/arch/powerpc/platforms/86xx/gef_ppc9a.c
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -102,8 +102,8 @@ static unsigned int gef_ppc9a_get_pcb_rev(void)
 {
        unsigned int reg;
 
-       reg = ioread32(ppc9a_regs);
-       return (reg >> 8) & 0xff;
+       reg = ioread32be(ppc9a_regs);
+       return (reg >> 16) & 0xff;
 }
 
 /* Return the board (software) revision */
@@ -111,8 +111,8 @@ static unsigned int gef_ppc9a_get_board_rev(void)
 {
        unsigned int reg;
 
-       reg = ioread32(ppc9a_regs);
-       return (reg >> 16) & 0xff;
+       reg = ioread32be(ppc9a_regs);
+       return (reg >> 8) & 0xff;
 }
 
 /* Return the FPGA revision */
@@ -120,8 +120,26 @@ static unsigned int gef_ppc9a_get_fpga_rev(void)
 {
        unsigned int reg;
 
-       reg = ioread32(ppc9a_regs);
-       return (reg >> 24) & 0xf;
+       reg = ioread32be(ppc9a_regs);
+       return reg & 0xf;
+}
+
+/* Return VME Geographical Address */
+static unsigned int gef_ppc9a_get_vme_geo_addr(void)
+{
+       unsigned int reg;
+
+       reg = ioread32be(ppc9a_regs + 0x4);
+       return reg & 0x1f;
+}
+
+/* Return VME System Controller Status */
+static unsigned int gef_ppc9a_get_vme_is_syscon(void)
+{
+       unsigned int reg;
+
+       reg = ioread32be(ppc9a_regs + 0x4);
+       return (reg >> 9) & 0x1;
 }
 
 static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
@@ -131,10 +149,15 @@ static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
 
        seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(),
-               ('A' + gef_ppc9a_get_board_rev() - 1));
+               ('A' + gef_ppc9a_get_board_rev()));
        seq_printf(m, "FPGA Revision\t: %u\n", gef_ppc9a_get_fpga_rev());
 
        seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+
+       seq_printf(m, "VME geo. addr\t: %u\n", gef_ppc9a_get_vme_geo_addr());
+
+       seq_printf(m, "VME syscon\t: %s\n",
+               gef_ppc9a_get_vme_is_syscon() ? "yes" : "no");
 }
 
 static void __init gef_ppc9a_nec_fixup(struct pci_dev *pdev)