Add default implementation of PredicateInstruction().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37123 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/TargetInstrInfo.cpp b/lib/Target/TargetInstrInfo.cpp
index b9fca8a1bfde635b6dfb424967617988bc1046a4..fe5ee1d25e08e8ad8d5b779cd242f013582278e0 100644 (file)
--- a/lib/Target/TargetInstrInfo.cpp
+++ b/lib/Target/TargetInstrInfo.cpp
@@ -59,3 +59,23 @@ MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI) const {
     MI->getOperand(1).unsetIsKill();
   return MI;
 }
+
+void TargetInstrInfo::PredicateInstruction(MachineInstr *MI,
+                                      std::vector<MachineOperand> &Cond) const {
+  const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
+  assert((TID->Flags & M_PREDICABLE) &&
+         "Predicating an unpredicable instruction!");
+
+  for (unsigned j = 0, i = 0, e = MI->getNumOperands(); i != e; ++i) {
+    if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
+      MachineOperand &MO = MI->getOperand(i);
+      if (MO.isReg())
+        MO.setReg(Cond[j].getReg());
+      else if (MO.isImm())
+        MO.setImm(Cond[j].getImmedValue());
+      else if (MO.isMBB())
+        MO.setMachineBasicBlock(Cond[j].getMachineBasicBlock());
+      ++j;
+    }
+  }
+}