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Fix bit initializer which was one bit too long, but worked so long as we silently...
author
Pete Cooper
<peter_cooper@apple.com>
Thu, 31 Jul 2014 01:43:51 +0000
(
01:43
+0000)
committer
Pete Cooper
<peter_cooper@apple.com>
Thu, 31 Jul 2014 01:43:51 +0000
(
01:43
+0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214372
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/ARM/ARMInstrInfo.td
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diff --git
a/lib/Target/ARM/ARMInstrInfo.td
b/lib/Target/ARM/ARMInstrInfo.td
index b2d6a68b96054a4b02db2ec5de0741e55aa41d89..f6cf69a2fbb4f8360b9d604d9f020cf92a25c2ba 100644
(file)
--- a/
lib/Target/ARM/ARMInstrInfo.td
+++ b/
lib/Target/ARM/ARMInstrInfo.td
@@
-4117,7
+4117,7
@@
def UDIV : ADivA1I<0b011, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), IIC_iDIV,
// Misc. Arithmetic Instructions.
//
-def CLZ : AMiscA1I<0b000
0
10110, 0b0001, (outs GPR:$Rd), (ins GPR:$Rm),
+def CLZ : AMiscA1I<0b00010110, 0b0001, (outs GPR:$Rd), (ins GPR:$Rm),
IIC_iUNAr, "clz", "\t$Rd, $Rm",
[(set GPR:$Rd, (ctlz GPR:$Rm))]>, Requires<[IsARM, HasV5T]>,
Sched<[WriteALU]>;