Add missing mul aliases for armv4 support. Add checks that armv4 can

assemble the various mul instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199026 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 3d38cc98960c28f2d518f5c1ba7665ad5552846b..2a28122b6c1e4c9ce8eadc48a1aa041a2af3b4f5 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -5596,9 +5596,18 @@ def : ARMInstAlias<"neg${s}${p} $Rd, $Rm",
 def : InstAlias<"nop${p}", (MOVr R0, R0, pred:$p, zero_reg)>,
          Requires<[IsARM, NoV6]>;
 
-// UMULL/SMULL are available on all arches, but the instruction definitions
-// need difference constraints pre-v6. Use these aliases for the assembly
-// parsing on pre-v6.
+// MUL/UMLAL/SMLAL/UMULL/SMULL are available on all arches, but
+// the instruction definitions need difference constraints pre-v6.
+// Use these aliases for the assembly parsing on pre-v6.
+def : InstAlias<"mul${s}${p} $Rd, $Rn, $Rm",
+            (MUL GPRnopc:$Rd, GPRnopc:$Rn, GPRnopc:$Rm, pred:$p, cc_out:$s)>,
+         Requires<[IsARM, NoV6]>;
+def : InstAlias<"smlal${s}${p} $RdLo, $RdHi, $Rn, $Rm",
+            (SMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
+         Requires<[IsARM, NoV6]>;
+def : InstAlias<"umlal${s}${p} $RdLo, $RdHi, $Rn, $Rm",
+            (UMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
+         Requires<[IsARM, NoV6]>;
 def : InstAlias<"smull${s}${p} $RdLo, $RdHi, $Rn, $Rm",
             (SMULL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
          Requires<[IsARM, NoV6]>;

diff --git a/test/MC/ARM/directive-arch-armv4.s b/test/MC/ARM/directive-arch-armv4.s
index 418e2f7787b27b7a99d7b6c60997ad7e1aa03b19..8c51efe0dfb2cb498e1d5016aacc6fbd5c9f4fe9 100644 (file)
--- a/test/MC/ARM/directive-arch-armv4.s
+++ b/test/MC/ARM/directive-arch-armv4.s
@@ -18,7 +18,7 @@
 @ CHECK-OBJ:    Flags [ (0x0)
 @ CHECK-OBJ:    ]
 @ CHECK-OBJ:    Address: 0x0
-@ CHECK-OBJ:    Offset: 0x34
+@ CHECK-OBJ:    Offset: 0x{{[0-9A-F]*}}
 @ CHECK-OBJ:    Size: 23
 @ CHECK-OBJ:    Link: 0
 @ CHECK-OBJ:    Info: 0
@@ -28,3 +28,12 @@
 @ CHECK-OBJ:      0000: 41160000 00616561 62690001 0C000000  |A....aeabi......|
 @ CHECK-OBJ:      0010: 05340006 010801                      |.4.....|
 @ CHECK-OBJ:    )
+
+
+@ Check that multiplication is supported
+       mul r4, r5, r6
+       smull r4, r5, r6, r3
+       umull r4, r5, r6, r3
+       umlal r4, r5, r6, r3
+       umaal r4, r5, r6, r3
+       smlal r4, r5, r6, r3