Fix assertion to not dereference end!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14991 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 24508fbbb024f6deda4f01958b374b33239c37f2..dbed7973fc4b78a0ad523bf161ecabc9a4a02cfd 100644 (file)
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -399,8 +399,8 @@ void RA::assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur)
         std::vector<LiveInterval*>::iterator addedItEnd = added.end();
         for (IntervalPtrs::iterator i = unhandled_.begin(), e =unhandled_.end();
              i != e && addedIt != addedItEnd; ++i) {
-            while ((*i)->start() > (*addedIt)->start() && 
-                   addedIt != addedItEnd) {
+            while (addedIt != addedItEnd &&
+                   (*i)->start() > (*addedIt)->start()) {
 #ifndef NDEBUG
                 // This code only works if addIntervalsForSpills retursn a
                 // sorted interval list.  Assert this is the case now.