merge from kernel 2.6.32 develop

diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 9b07470c5f9f608c89308319dcf2c1c954bc2f3e..576bf90ba7732fe1f85fd0cf02564b88474ae33a 100755 (executable)
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -2888,11 +2888,17 @@ hub_port_init (struct usb_hub *hub, struct usb_device *udev, int port1,
                udev->ttport = hdev->ttport;
        } else if (udev->speed != USB_SPEED_HIGH
                        && hdev->speed == USB_SPEED_HIGH) {
+                       
+       /* yk@rk 20110617
+        * parent hub has no TT would not be error in rk29
+        */
+               #if 0
                if (!hub->tt.hub) {
                        dev_err(&udev->dev, "parent hub has no TT\n");
                        retval = -EINVAL;
                        goto fail;
                }
+               #endif
                udev->tt = &hub->tt;
                udev->ttport = port1;
        }

diff --git a/drivers/usb/dwc_otg/dwc_otg_cil.c b/drivers/usb/dwc_otg/dwc_otg_cil.c
index 316387d5491fd189dc7ba1afdff4894a5d4db5cd..d0fdfbd44dae0942732b9128ca7fe5a85104ef8a 100755 (executable)
--- a/drivers/usb/dwc_otg/dwc_otg_cil.c
+++ b/drivers/usb/dwc_otg/dwc_otg_cil.c
@@ -2420,6 +2420,7 @@ void dwc_otg_ep0_start_transfer(dwc_otg_core_if_t *_core_if, dwc_ep_t *_ep)
                {       
                        dwc_write_reg32 (&(in_regs->diepdma), 
                                (uint32_t)_ep->dma_addr);
+                   _ep->dma_addr += _ep->xfer_len;
                }
        
                /* EP enable, IN data in FIFO */

diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c b/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c
index 21e341f964fbf2a4e52e2e92b3f37fb6d6ebe7ef..8a1665a001d1b29790e34a67c3c576371b2d215f 100755 (executable)
--- a/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c
+++ b/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c
@@ -519,6 +519,12 @@ int32_t dwc_otg_hcd_handle_hc_intr (dwc_otg_hcd_t *_dwc_otg_hcd)
                        retval |= dwc_otg_hcd_handle_hc_n_intr (_dwc_otg_hcd, hcnum);
                }
        }
+       haint.d32 = dwc_otg_read_host_all_channels_intr(_dwc_otg_hcd->core_if);
+       int i;
+       for (i = 0; i < _dwc_otg_hcd->core_if->core_params->host_channels; i++) {
+               if (haint.b2.chint & (1 << i))
+                       retval |= dwc_otg_hcd_handle_hc_n_intr(_dwc_otg_hcd, i);
+       }
 #endif
        return retval;
 }