ktime_t rga_start;\r
ktime_t rga_end;\r
\r
-dev_t rga_devi;\r
-\r
struct rga_drvdata {\r
struct miscdevice miscdev;\r
struct device dev;\r
\r
/* All CMD finish int */\r
rga_write(0x1<<10, RGA_INT);\r
-\r
\r
#if RGA_TEST_TIME\r
rga_start = ktime_get();\r
sah = req->src.act_h;\r
daw = req->dst.act_w;\r
dah = req->dst.act_h;\r
-\r
+ \r
#if RGA_TEST\r
\r
printk("src.yrgb_addr = %.8x, src.uv_addr = %.8x, src.v_addr = %.8x\n", \r
//rga_power_on();\r
atomic_set(®->int_enable, 1); \r
rga_try_set_reg(num);\r
-\r
+ \r
ret_timeout = wait_event_interruptible_timeout(session->wait, atomic_read(&session->done), RGA_TIMEOUT_DELAY);\r
+\r
+ rga_soft_reset();\r
if (unlikely(ret_timeout< 0)) \r
{\r
pr_err("pid %d wait task ret %d\n", session->pid, ret_timeout);\r
printk(" INT ERROR RGA is not idle!\n");\r
rga_soft_reset();\r
}\r
+\r
+ rga_soft_reset();\r
\r
spin_lock(&rga_service.lock);\r
do\r
#include "rga_mmu_info.h"\r
\r
extern rga_service_info rga_service;\r
+extern int mmu_buff_temp[1024];\r
\r
#define KERNEL_SPACE_VALID 0xc0000000\r
\r
break; \r
}\r
\r
- MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);\r
+ MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL); \r
if(MMU_Base == NULL) {\r
pr_err("RGA MMU malloc MMU_Base point failed\n");\r
status = RGA_MALLOC_ERROR;\r
}\r
\r
if(req->src.yrgb_addr < KERNEL_SPACE_VALID)\r
- {\r
- \r
+ { \r
ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);\r
if (ret < 0) {\r
pr_err("rga map src memory failed\n");\r
status = ret;\r
break;\r
- }\r
- \r
+ } \r
}\r
else\r
{\r
reg = *RGA_MMU_CTRL_ADDR; \r
reg = ((reg & (~m_RGA_MMU_CTRL_PAGE_TABLE_SIZE)) | s_RGA_MMU_CTRL_PAGE_TABLE_SIZE(TLB_size));\r
reg = ((reg & (~m_RGA_MMU_CTRL_MMU_ENABLE)) | s_RGA_MMU_CTRL_MMU_ENABLE(mmu_enable));\r
- reg = ((reg & (~m_RGA_MMU_CTRL_SRC_FLUSH)) | s_RGA_MMU_CTRL_SRC_FLUSH(src_flag));\r
- reg = ((reg & (~m_RGA_MMU_CTRL_DST_FLUSH)) | s_RGA_MMU_CTRL_DST_FLUSH(dst_flag));\r
+ reg = ((reg & (~m_RGA_MMU_CTRL_SRC_FLUSH)) | s_RGA_MMU_CTRL_SRC_FLUSH(1));\r
+ reg = ((reg & (~m_RGA_MMU_CTRL_DST_FLUSH)) | s_RGA_MMU_CTRL_DST_FLUSH(1));\r
reg = ((reg & (~m_RGA_MMU_CTRL_CMD_CHAN_FLUSH)) | s_RGA_MMU_CTRL_CMD_CHAN_FLUSH(CMD_flag));\r
*RGA_MMU_CTRL_ADDR = reg;\r
\r