Teach ValueTracking to look at the dividend when determining the sign bit of an

srem instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126637 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Analysis/ValueTracking.cpp b/lib/Analysis/ValueTracking.cpp
index 1060bc5349e4519faad19dbc2cdf63349a0d4d3f..fac0407da52db98f4a00a32b373cb515ebb28a84 100644 (file)
--- a/lib/Analysis/ValueTracking.cpp
+++ b/lib/Analysis/ValueTracking.cpp
@@ -460,6 +460,18 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
         assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 
       }
     }
+    if (Mask.isNegative()) {  // We're looking for the sign bit.
+      APInt Mask2 = APInt::getSignBit(BitWidth);
+      KnownZero2 = 0;
+      KnownOne2 = 0;
+      ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD, 
+                        Depth+1);
+      if (KnownOne2[BitWidth-1])
+        KnownOne |= Mask2;
+      if (KnownZero2[BitWidth-1])
+        KnownZero |= Mask2;
+      assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+    }
     break;
   case Instruction::URem: {
     if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) {