git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120504
91177308-0d34-0410-b5e6-
96231b3b80d8
//
// This design assumes only a fast mechanism for intersecting a single live
// virtual register segment with a set of LiveIntervalUnion segments. This may
-// be ok since most VIRTREGs have very few segments. If we had a data
+// be ok since most virtual registers have very few segments. If we had a data
// structure that optimizd MxN intersection of segments, then we would bypass
// the loop that advances within the LiveInterval.
//