gpio/omap: optimise interrupt service routine
authorJon Hunter <jon-hunter@ti.com>
Thu, 4 Apr 2013 20:16:14 +0000 (15:16 -0500)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 10 Apr 2013 21:41:16 +0000 (23:41 +0200)
The OMAP GPIO interrupt service routine is checking each bit in the
GPIO interrupt status register to see which bits are set. It is not
efficient to check every bit especially if only a few bits are set.
Therefore, instead of checking every bit use the __ffs() function,
which returns the location of the first set bit, to find all the set
bits.

This optimisation was suggested-by and developed in collaboration
with Felipe Balbi.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/gpio/gpio-omap.c

index 405ce6fd2e5c4b0497ccb60ed0b202223c02fa66..f46b600e5e567329ee94fc921cc8dfb3c569320b 100644 (file)
@@ -689,7 +689,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
        void __iomem *isr_reg = NULL;
        u32 isr;
-       unsigned int i;
+       unsigned int bit;
        struct gpio_bank *bank;
        int unmasked = 0;
        struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -730,9 +730,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                if (!isr)
                        break;
 
-               for (i = 0; isr != 0; isr >>= 1, i++) {
-                       if (!(isr & 1))
-                               continue;
+               while (isr) {
+                       bit = __ffs(isr);
+                       isr &= ~(1 << bit);
 
                        /*
                         * Some chips can't respond to both rising and falling
@@ -741,10 +741,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                         * to respond to the IRQ for the opposite direction.
                         * This will be indicated in the bank toggle_mask.
                         */
-                       if (bank->toggle_mask & (1 << i))
-                               _toggle_gpio_edge_triggering(bank, i);
+                       if (bank->toggle_mask & (1 << bit))
+                               _toggle_gpio_edge_triggering(bank, bit);
 
-                       generic_handle_irq(irq_find_mapping(bank->domain, i));
+                       generic_handle_irq(irq_find_mapping(bank->domain, bit));
                }
        }
        /* if bank has any level sensitive GPIO pin interrupt