MachineRegisterInfo *RegInfo;
SelectionDAG *CurDAG;
SelectionDAGBuilder *SDB;
- MachineBasicBlock *BB;
AliasAnalysis *AA;
GCFunctionInfo *GFI;
CodeGenOpt::Level OptLevel;
void PrepareEHLandingPad(MachineBasicBlock *BB);
void SelectAllBasicBlocks(const Function &Fn);
- void FinishBasicBlock();
+ void FinishBasicBlock(MachineBasicBlock *BB);
- void SelectBasicBlock(const BasicBlock *LLVMBB,
+ void SelectBasicBlock(MachineBasicBlock *BB,
+ const BasicBlock *LLVMBB,
BasicBlock::const_iterator Begin,
BasicBlock::const_iterator End,
bool &HadTailCall);
- void CodeGenAndEmitDAG();
+ void CodeGenAndEmitDAG(MachineBasicBlock *BB);
void LowerArguments(const BasicBlock *BB);
void ShrinkDemandedOps();
FastIS->setCurDebugLoc(DebugLoc());
}
-void SelectionDAGISel::SelectBasicBlock(const BasicBlock *LLVMBB,
+void SelectionDAGISel::SelectBasicBlock(MachineBasicBlock *BB,
+ const BasicBlock *LLVMBB,
BasicBlock::const_iterator Begin,
BasicBlock::const_iterator End,
bool &HadTailCall) {
CurDAG->setRoot(SDB->getControlRoot());
// Final step, emit the lowered DAG as machine code.
- CodeGenAndEmitDAG();
+ CodeGenAndEmitDAG(BB);
HadTailCall = SDB->HasTailCall;
SDB->clear();
}
} while (!Worklist.empty());
}
-void SelectionDAGISel::CodeGenAndEmitDAG() {
+void SelectionDAGISel::CodeGenAndEmitDAG(MachineBasicBlock *BB) {
std::string GroupName;
if (TimePassesIsEnabled)
GroupName = "Instruction Selection and Scheduling";
// Iterate over all basic blocks in the function.
for (Function::const_iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
const BasicBlock *LLVMBB = &*I;
- BB = FuncInfo->MBBMap[LLVMBB];
+ MachineBasicBlock *BB = FuncInfo->MBBMap[LLVMBB];
BasicBlock::const_iterator const Begin = LLVMBB->begin();
BasicBlock::const_iterator const End = LLVMBB->end();
// beginning FastISel on the entry block.
if (LLVMBB == &Fn.getEntryBlock()) {
CurDAG->setRoot(SDB->getControlRoot());
- CodeGenAndEmitDAG();
+ CodeGenAndEmitDAG(BB);
SDB->clear();
}
FastIS->startNewBlock(BB);
}
bool HadTailCall = false;
- SelectBasicBlock(LLVMBB, BI, llvm::next(BI), HadTailCall);
+ SelectBasicBlock(BB, LLVMBB, BI, llvm::next(BI), HadTailCall);
// If the call was emitted as a tail call, we're done with the block.
if (HadTailCall) {
// block.
if (BI != End) {
bool HadTailCall;
- SelectBasicBlock(LLVMBB, BI, End, HadTailCall);
+ SelectBasicBlock(BB, LLVMBB, BI, End, HadTailCall);
}
- FinishBasicBlock();
+ FinishBasicBlock(BB);
}
delete FastIS;
}
void
-SelectionDAGISel::FinishBasicBlock() {
+SelectionDAGISel::FinishBasicBlock(MachineBasicBlock *BB) {
DEBUG(dbgs() << "Target-post-processed machine code:\n");
DEBUG(BB->dump());
// Emit the code
SDB->visitBitTestHeader(SDB->BitTestCases[i], BB);
CurDAG->setRoot(SDB->getRoot());
- CodeGenAndEmitDAG();
+ CodeGenAndEmitDAG(BB);
SDB->clear();
}
CurDAG->setRoot(SDB->getRoot());
- CodeGenAndEmitDAG();
+ CodeGenAndEmitDAG(BB);
SDB->clear();
}
SDB->visitJumpTableHeader(SDB->JTCases[i].second, SDB->JTCases[i].first,
BB);
CurDAG->setRoot(SDB->getRoot());
- CodeGenAndEmitDAG();
+ CodeGenAndEmitDAG(BB);
SDB->clear();
}
// Emit the code
SDB->visitJumpTable(SDB->JTCases[i].second);
CurDAG->setRoot(SDB->getRoot());
- CodeGenAndEmitDAG();
+ CodeGenAndEmitDAG(BB);
SDB->clear();
// Update PHI Nodes
// Emit the code
SDB->visitSwitchCase(SDB->SwitchCases[i], BB);
CurDAG->setRoot(SDB->getRoot());
- CodeGenAndEmitDAG();
+ CodeGenAndEmitDAG(BB);
// Handle any PHI nodes in successors of this chunk, as if we were coming
// from the original BB before switch expansion. Note that PHI nodes can