arm64: dts: rockchip: add pcie clkreq for cpm mode in rk3399.dtsi

Since we don't support L1 substate due to the errata of TRM,
let's instead add cpm mode if possible. Note that in cpm mode,
clkreq should be a GPIO and the EP will take over the ownship
of it and de-assert it when exiting from the low power mode.

Change-Id: I4d5542289c0118ba8702ad6b2783e6fad64828a1
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 9a6aface98baa49e4f6475d2ea8d5b7df90aa4b5..ebc229706fefa68422000398cd509220ed298f03 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2619,6 +2619,23 @@
                                rockchip,pins =
                                        <4 24 RK_FUNC_1 &pcfg_pull_none>;
                        };
+
+                       pcie_clkreqn_cpm: pci-clkreqn-cpm {
+                               /*
+                                * Since our pcie doesn't support
+                                * ClockPM(CPM), we want to hack this as
+                                * gpio, so the EP could be able to
+                                * de-assert it along and make ClockPM(CPM)
+                                * work.
+                                */
+                               rockchip,pins =
+                                       <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
+                       };
+
+                       pcie_clkreqnb_cpm: pci-clkreqnb-cpm {
+                               rockchip,pins =
+                                       <4 24 RK_FUNC_GPIO &pcfg_pull_none>;
+                       };
                };
        };
 };