Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.
authorEvan Cheng <evan.cheng@apple.com>
Fri, 1 Jul 2011 22:36:09 +0000 (22:36 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Fri, 1 Jul 2011 22:36:09 +0000 (22:36 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8

54 files changed:
Makefile.rules
lib/Target/ARM/ARMSubtarget.cpp
lib/Target/ARM/ARMSubtarget.h
lib/Target/ARM/CMakeLists.txt
lib/Target/ARM/Makefile
lib/Target/Alpha/AlphaSubtarget.cpp
lib/Target/Alpha/AlphaSubtarget.h
lib/Target/Alpha/CMakeLists.txt
lib/Target/Alpha/Makefile
lib/Target/Blackfin/BlackfinSubtarget.cpp
lib/Target/Blackfin/BlackfinSubtarget.h
lib/Target/Blackfin/CMakeLists.txt
lib/Target/Blackfin/Makefile
lib/Target/CellSPU/CMakeLists.txt
lib/Target/CellSPU/Makefile
lib/Target/CellSPU/SPUSubtarget.cpp
lib/Target/CellSPU/SPUSubtarget.h
lib/Target/MBlaze/CMakeLists.txt
lib/Target/MBlaze/MBlazeSubtarget.cpp
lib/Target/MBlaze/MBlazeSubtarget.h
lib/Target/MBlaze/Makefile
lib/Target/MSP430/CMakeLists.txt
lib/Target/MSP430/MSP430Subtarget.cpp
lib/Target/MSP430/MSP430Subtarget.h
lib/Target/MSP430/Makefile
lib/Target/Mips/CMakeLists.txt
lib/Target/Mips/Makefile
lib/Target/Mips/MipsSubtarget.cpp
lib/Target/Mips/MipsSubtarget.h
lib/Target/PTX/CMakeLists.txt
lib/Target/PTX/Makefile
lib/Target/PTX/PTXSubtarget.cpp
lib/Target/PTX/PTXSubtarget.h
lib/Target/PowerPC/CMakeLists.txt
lib/Target/PowerPC/Makefile
lib/Target/PowerPC/PPCSubtarget.cpp
lib/Target/PowerPC/PPCSubtarget.h
lib/Target/Sparc/CMakeLists.txt
lib/Target/Sparc/Makefile
lib/Target/Sparc/SparcSubtarget.cpp
lib/Target/Sparc/SparcSubtarget.h
lib/Target/SystemZ/CMakeLists.txt
lib/Target/SystemZ/Makefile
lib/Target/SystemZ/SystemZSubtarget.cpp
lib/Target/SystemZ/SystemZSubtarget.h
lib/Target/X86/CMakeLists.txt
lib/Target/X86/MCTargetDesc/X86TargetDesc.cpp
lib/Target/X86/Makefile
lib/Target/X86/X86Subtarget.cpp
lib/Target/X86/X86Subtarget.h
lib/Target/XCore/CMakeLists.txt
lib/Target/XCore/Makefile
lib/Target/XCore/XCoreSubtarget.cpp
lib/Target/XCore/XCoreSubtarget.h

index 19520dd555515da893b9a24d54a542fac8b5a5eb..9dcb5ddd5fea885bd6676ba7c39679103b1772e9 100644 (file)
@@ -1775,8 +1775,8 @@ $(ObjDir)/%GenFastISel.inc.tmp : %.td $(ObjDir)/.dir
        $(Echo) "Building $(<F) \"fast\" instruction selector implementation with tblgen"
        $(Verb) $(TableGen) -gen-fast-isel -o $(call SYSPATH, $@) $<
 
-$(TARGET:%=$(ObjDir)/%GenSubtarget.inc.tmp): \
-$(ObjDir)/%GenSubtarget.inc.tmp : %.td $(ObjDir)/.dir
+$(TARGET:%=$(ObjDir)/%GenSubtargetInfo.inc.tmp): \
+$(ObjDir)/%GenSubtargetInfo.inc.tmp : %.td $(ObjDir)/.dir
        $(Echo) "Building $(<F) subtarget information with tblgen"
        $(Verb) $(TableGen) -gen-subtarget -o $(call SYSPATH, $@) $<
 
index 5f94a1f8633e9ae731d0c185f862a9457e7eeb88..a7010c5be1bf218dbb71ea9f20b91721353d323e 100644 (file)
@@ -21,7 +21,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "ARMGenSubtarget.inc"
+#include "ARMGenSubtargetInfo.inc"
 
 using namespace llvm;
 
index 3a9431f0908fa4a6f0f1d1c6e2704f7a6cdc7c85..66e4426091d1203c3328a778b1d94a222386b2a3 100644 (file)
@@ -20,7 +20,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "ARMGenSubtarget.inc"
+#include "ARMGenSubtargetInfo.inc"
 
 namespace llvm {
 class GlobalValue;
index b1d4f540247af5d3847a1e2776ce58daa9e2a34f..a261ca09bb2c1890369359ab184e2f064a5b2ba9 100644 (file)
@@ -9,7 +9,7 @@ tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher)
 tablegen(ARMGenDAGISel.inc -gen-dag-isel)
 tablegen(ARMGenFastISel.inc -gen-fast-isel)
 tablegen(ARMGenCallingConv.inc -gen-callingconv)
-tablegen(ARMGenSubtarget.inc -gen-subtarget)
+tablegen(ARMGenSubtargetInfo.inc -gen-subtarget)
 tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
 tablegen(ARMGenDecoderTables.inc -gen-arm-decoder)
 
index 6472c53d0d0e0ce3146f0a7418bbe4d12045659b..51a8ac4119f5a13dc716c5152c4b127e3d4e6964 100644 (file)
@@ -14,7 +14,7 @@ TARGET = ARM
 # Make sure that tblgen is run, first thing.
 BUILT_SOURCES = ARMGenRegisterInfo.inc ARMGenInstrInfo.inc \
                ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \
-                ARMGenDAGISel.inc ARMGenSubtarget.inc \
+                ARMGenDAGISel.inc ARMGenSubtargetInfo.inc \
                 ARMGenCodeEmitter.inc ARMGenCallingConv.inc \
                 ARMGenDecoderTables.inc ARMGenEDInfo.inc \
                 ARMGenFastISel.inc ARMGenMCCodeEmitter.inc
index c1effe6fa9736dd59262baa38000ab1585a8888b..fce65fc570bca8b6cdf358588229316a9479fb67 100644 (file)
 
 #include "AlphaSubtarget.h"
 #include "Alpha.h"
-#include "AlphaGenSubtarget.inc"
 
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "AlphaGenSubtarget.inc"
+#include "AlphaGenSubtargetInfo.inc"
 
 using namespace llvm;
 
index 2924921426bee8ccff980ab9ad3fd4096361abe1..847d4956e11851532666681f60a66518b2f659e1 100644 (file)
@@ -19,7 +19,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "AlphaGenSubtarget.inc"
+#include "AlphaGenSubtargetInfo.inc"
 
 namespace llvm {
 
index 1f9edcf48ab1afbcad1b702ca60ecbf842f10214..3121889f73c35506de603034636febcee869f7bb 100644 (file)
@@ -5,7 +5,7 @@ tablegen(AlphaGenInstrInfo.inc -gen-instr-info)
 tablegen(AlphaGenAsmWriter.inc -gen-asm-writer)
 tablegen(AlphaGenDAGISel.inc -gen-dag-isel)
 tablegen(AlphaGenCallingConv.inc -gen-callingconv)
-tablegen(AlphaGenSubtarget.inc -gen-subtarget)
+tablegen(AlphaGenSubtargetInfo.inc -gen-subtarget)
 
 add_llvm_target(AlphaCodeGen
   AlphaAsmPrinter.cpp
index 40c4f903f310bb0e743aded287904b680681a0e0..9409ae57edf099b17d841afda08010c35041d96d 100644 (file)
@@ -14,7 +14,7 @@ TARGET = Alpha
 # Make sure that tblgen is run, first thing.
 BUILT_SOURCES = AlphaGenRegisterInfo.inc AlphaGenInstrInfo.inc \
                 AlphaGenAsmWriter.inc AlphaGenDAGISel.inc \
-                AlphaGenCallingConv.inc AlphaGenSubtarget.inc
+                AlphaGenCallingConv.inc AlphaGenSubtargetInfo.inc
 
 DIRS = TargetInfo
 
index 694658012c7627e9f97efde676b258121cea3140..9d1d4816d3d54eb42594f34308ed780a6cf75282 100644 (file)
@@ -16,7 +16,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "BlackfinGenSubtarget.inc"
+#include "BlackfinGenSubtargetInfo.inc"
 
 using namespace llvm;
 
index 9786fec9df0693660a6c2cfe26a0077853f12203..a7d6c16261223da8696782387c619122ded408fe 100644 (file)
@@ -18,7 +18,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "BlackfinGenSubtarget.inc"
+#include "BlackfinGenSubtargetInfo.inc"
 
 namespace llvm {
 
index 8fc63aa3dc77b0c861e34a28b48432cfa6cef517..9df4ab09038e0c024beac3478ecb7139f2ebd39c 100644 (file)
@@ -4,7 +4,7 @@ tablegen(BlackfinGenRegisterInfo.inc -gen-register-info)
 tablegen(BlackfinGenInstrInfo.inc -gen-instr-info)
 tablegen(BlackfinGenAsmWriter.inc -gen-asm-writer)
 tablegen(BlackfinGenDAGISel.inc -gen-dag-isel)
-tablegen(BlackfinGenSubtarget.inc -gen-subtarget)
+tablegen(BlackfinGenSubtargetInfo.inc -gen-subtarget)
 tablegen(BlackfinGenCallingConv.inc -gen-callingconv)
 tablegen(BlackfinGenIntrinsics.inc -gen-tgt-intrinsic)
 
index a9edec78b5a0557c387aa2dea837d2a5bb8cd458..63f15436688779d382ef5fd5120cfbec47f955ef 100644 (file)
@@ -14,7 +14,7 @@ TARGET = Blackfin
 # Make sure that tblgen is run, first thing.
 BUILT_SOURCES = BlackfinGenRegisterInfo.inc BlackfinGenInstrInfo.inc \
                BlackfinGenAsmWriter.inc \
-                BlackfinGenDAGISel.inc BlackfinGenSubtarget.inc \
+                BlackfinGenDAGISel.inc BlackfinGenSubtargetInfo.inc \
                BlackfinGenCallingConv.inc BlackfinGenIntrinsics.inc
 
 DIRS = TargetInfo
index d769cb9316ce034bdb42243b7e395843cdac23dd..14e8208ce924b44032630102a907768ea685062f 100644 (file)
@@ -5,7 +5,7 @@ tablegen(SPUGenCodeEmitter.inc -gen-emitter)
 tablegen(SPUGenRegisterInfo.inc -gen-register-info)
 tablegen(SPUGenInstrInfo.inc -gen-instr-info)
 tablegen(SPUGenDAGISel.inc -gen-dag-isel)
-tablegen(SPUGenSubtarget.inc -gen-subtarget)
+tablegen(SPUGenSubtargetInfo.inc -gen-subtarget)
 tablegen(SPUGenCallingConv.inc -gen-callingconv)
 
 add_llvm_target(CellSPUCodeGen
index 5bb6f9cc58f931a007143bb1c4f229bb0648e0ef..c804b166bf5d6b3cf4e6d8853934cbf3db332b18 100644 (file)
@@ -13,7 +13,7 @@ TARGET = SPU
 BUILT_SOURCES = SPUGenInstrInfo.inc SPUGenRegisterInfo.inc \
                SPUGenAsmWriter.inc SPUGenCodeEmitter.inc \
                SPUGenDAGISel.inc \
-               SPUGenSubtarget.inc SPUGenCallingConv.inc
+               SPUGenSubtargetInfo.inc SPUGenCallingConv.inc
 
 DIRS = TargetInfo
 
index 4e136a4709a2c0c9f2845a3fd9b9946ad6bf6ceb..2481e3b9fc9ca0aa55824b7890a4afba144f5ed3 100644 (file)
@@ -19,7 +19,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "SPUGenSubtarget.inc"
+#include "SPUGenSubtargetInfo.inc"
 
 using namespace llvm;
 
index 72f36ec674a7600b5f8615c2177e07e16c581256..19b97d3a0c79adc4b8d20b1ad59826bfa3228a61 100644 (file)
@@ -19,7 +19,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "SPUGenSubtarget.inc"
+#include "SPUGenSubtargetInfo.inc"
 
 namespace llvm {
   class GlobalValue;
index 2aa984789d1bfabc3906327ac91b959d50d8503f..536726d8039df47c27d7c741ae62fc07d9416247 100644 (file)
@@ -7,7 +7,7 @@ tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer)
 tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher)
 tablegen(MBlazeGenDAGISel.inc -gen-dag-isel)
 tablegen(MBlazeGenCallingConv.inc -gen-callingconv)
-tablegen(MBlazeGenSubtarget.inc -gen-subtarget)
+tablegen(MBlazeGenSubtargetInfo.inc -gen-subtarget)
 tablegen(MBlazeGenIntrinsics.inc -gen-tgt-intrinsic)
 tablegen(MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info)
 
index df1eec6ebc0816933d23e59326f31e501d62b814..81578ce07a2b7b51a217eefca5fc96f05ac231a1 100644 (file)
@@ -19,7 +19,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "MBlazeGenSubtarget.inc"
+#include "MBlazeGenSubtargetInfo.inc"
 
 using namespace llvm;
 
index d337f23778d8d673a22b281e6236119ffaca2cd9..7d70040423212403f3d724e67361e558e460b586 100644 (file)
@@ -19,7 +19,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "MBlazeGenSubtarget.inc"
+#include "MBlazeGenSubtargetInfo.inc"
 
 namespace llvm {
 
index 171548f47bc166d76b1e62a82360af851629190a..829122f7e6f631016a8e572197c6b862329b91a5 100644 (file)
@@ -15,7 +15,7 @@ BUILT_SOURCES = MBlazeGenRegisterInfo.inc MBlazeGenInstrInfo.inc \
                MBlazeGenAsmWriter.inc \
                 MBlazeGenDAGISel.inc MBlazeGenAsmMatcher.inc \
                 MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \
-                MBlazeGenSubtarget.inc MBlazeGenIntrinsics.inc \
+                MBlazeGenSubtargetInfo.inc MBlazeGenIntrinsics.inc \
                 MBlazeGenEDInfo.inc
 
 DIRS = InstPrinter AsmParser Disassembler TargetInfo
index 613b25919626633f558b97ab70552a094dcd71c0..9d156e79920b4ae198507e69c003d5cc5d8142ee 100644 (file)
@@ -5,7 +5,7 @@ tablegen(MSP430GenInstrInfo.inc -gen-instr-info)
 tablegen(MSP430GenAsmWriter.inc -gen-asm-writer)
 tablegen(MSP430GenDAGISel.inc -gen-dag-isel)
 tablegen(MSP430GenCallingConv.inc -gen-callingconv)
-tablegen(MSP430GenSubtarget.inc -gen-subtarget)
+tablegen(MSP430GenSubtargetInfo.inc -gen-subtarget)
 
 add_llvm_target(MSP430CodeGen
   MSP430BranchSelector.cpp
index 81c6b8504a36592194b65215bc670bb4d048a8fe..bd8d7cda37f14cfc5c0251510309d90379d251f1 100644 (file)
@@ -17,7 +17,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "MSP430GenSubtarget.inc"
+#include "MSP430GenSubtargetInfo.inc"
 
 using namespace llvm;
 
index 034f88d77364af1927c31546e243ec0319b30433..ead213bcaedbc9ce344336a0a8c0f9daa138de70 100644 (file)
@@ -17,7 +17,7 @@
 #include "llvm/Target/TargetSubtargetInfo.h"
 
 #define GET_SUBTARGETINFO_HEADER
-#include "MSP430GenSubtarget.inc"
+#include "MSP430GenSubtargetInfo.inc"
 
 #include <string>
 
index 266330ae996d108fa6d6fb1eaedb5b4da39beead..30a4e491a6530966fc5699831cda8aa22a969d2c 100644 (file)
@@ -15,7 +15,7 @@ TARGET = MSP430
 BUILT_SOURCES = MSP430GenRegisterInfo.inc MSP430GenInstrInfo.inc \
                MSP430GenAsmWriter.inc \
                MSP430GenDAGISel.inc MSP430GenCallingConv.inc \
-               MSP430GenSubtarget.inc
+               MSP430GenSubtargetInfo.inc
 
 DIRS = InstPrinter TargetInfo
 
index 71b13c8dcbd9c7813860bba4570e9dde1acf4ce7..2c35c3678a0b915d30e6c9d573245c17711268a9 100644 (file)
@@ -5,7 +5,7 @@ tablegen(MipsGenInstrInfo.inc -gen-instr-info)
 tablegen(MipsGenAsmWriter.inc -gen-asm-writer)
 tablegen(MipsGenDAGISel.inc -gen-dag-isel)
 tablegen(MipsGenCallingConv.inc -gen-callingconv)
-tablegen(MipsGenSubtarget.inc -gen-subtarget)
+tablegen(MipsGenSubtargetInfo.inc -gen-subtarget)
 
 add_llvm_target(MipsCodeGen
   MipsAsmPrinter.cpp
index 0b6dd563f1a6cb859cd1a082ce3ce337bf43b516..eafcc4ac0cec3ddc02c59ccc4373dcabe6b6f7bf 100644 (file)
@@ -15,7 +15,7 @@ TARGET = Mips
 BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \
                MipsGenAsmWriter.inc \
                 MipsGenDAGISel.inc MipsGenCallingConv.inc \
-                MipsGenSubtarget.inc
+                MipsGenSubtargetInfo.inc
 
 DIRS = TargetInfo
 
index 437e71803058fbe66ca45670c6fbae49f63bf1ee..a96f872b7ce27efbc8e3143c8806ef6501c20650 100644 (file)
@@ -17,7 +17,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "MipsGenSubtarget.inc"
+#include "MipsGenSubtargetInfo.inc"
 
 using namespace llvm;
 
index c090252e2e91eb83caed99318a1dd92bcd47bea8..ae76470f5e3cf671884bfc413f03e16722de327b 100644 (file)
@@ -19,7 +19,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "MipsGenSubtarget.inc"
+#include "MipsGenSubtargetInfo.inc"
 
 namespace llvm {
 
index 33bae7cdbd282b0b67fb7942fa710f016c236579..0e138c0e3e7758802649979ddd2c381496a9e102 100644 (file)
@@ -5,7 +5,7 @@ tablegen(PTXGenCallingConv.inc -gen-callingconv)
 tablegen(PTXGenDAGISel.inc -gen-dag-isel)
 tablegen(PTXGenInstrInfo.inc -gen-instr-info)
 tablegen(PTXGenRegisterInfo.inc -gen-register-info)
-tablegen(PTXGenSubtarget.inc -gen-subtarget)
+tablegen(PTXGenSubtargetInfo.inc -gen-subtarget)
 
 add_llvm_target(PTXCodeGen
   PTXAsmPrinter.cpp
index 9dccb4a72a606789991676da8d831c0a76b0cd9f..da3f91524cbfcd1257f1b5f3731e551be80b5754 100644 (file)
@@ -17,7 +17,7 @@ BUILT_SOURCES = PTXGenAsmWriter.inc \
                PTXGenDAGISel.inc \
                PTXGenInstrInfo.inc \
                PTXGenRegisterInfo.inc \
-               PTXGenSubtarget.inc
+               PTXGenSubtargetInfo.inc
 
 DIRS = TargetInfo
 
index a13ddbd4ee70a21a7a13d77eab6719bed50f4480..5eff24a2b0556e5519bb5d46a5139fd33c387e71 100644 (file)
@@ -17,7 +17,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "PTXGenSubtarget.inc"
+#include "PTXGenSubtargetInfo.inc"
 
 using namespace llvm;
 
@@ -63,5 +63,3 @@ std::string PTXSubtarget::getPTXVersionString() const {
     case PTX_VERSION_2_3: return "2.3";
   }
 }
-
-#include "PTXGenSubtarget.inc"
index 073657368d66fd6eb9eff24dd0842547d8a08396..913f0a2da3979a55159347a0cf0cbaedd41aca3c 100644 (file)
@@ -17,7 +17,7 @@
 #include "llvm/Target/TargetSubtargetInfo.h"
 
 #define GET_SUBTARGETINFO_HEADER
-#include "PTXGenSubtarget.inc"
+#include "PTXGenSubtargetInfo.inc"
 
 namespace llvm {
   class PTXSubtarget : public PTXGenSubtargetInfo {
index ea11f4c3a78a70a8f8435d288aacf08596cdbbc3..be1b525e27df79a4f729cbf6198ec532d1ee5e8d 100644 (file)
@@ -7,7 +7,7 @@ tablegen(PPCGenRegisterInfo.inc -gen-register-info)
 tablegen(PPCGenInstrInfo.inc -gen-instr-info)
 tablegen(PPCGenDAGISel.inc -gen-dag-isel)
 tablegen(PPCGenCallingConv.inc -gen-callingconv)
-tablegen(PPCGenSubtarget.inc -gen-subtarget)
+tablegen(PPCGenSubtargetInfo.inc -gen-subtarget)
 
 add_llvm_target(PowerPCCodeGen
   PPCAsmBackend.cpp
index 2a18db7ad9bb0542a3732bbe377fdeda2da356e3..11abb9728be46da19f55fefa7477394ca7177240 100644 (file)
@@ -15,7 +15,7 @@ TARGET = PPC
 BUILT_SOURCES = PPCGenRegisterInfo.inc \
                 PPCGenAsmWriter.inc  PPCGenCodeEmitter.inc \
                 PPCGenInstrInfo.inc PPCGenDAGISel.inc \
-                PPCGenSubtarget.inc PPCGenCallingConv.inc \
+                PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \
                 PPCGenMCCodeEmitter.inc
 
 DIRS = InstPrinter TargetInfo
index 8d622d71232331fcc70e6ea5dee66ecd3f2ac649..75ee1c0990aad854e7a013288f3331887eef9aa7 100644 (file)
@@ -20,7 +20,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "PPCGenSubtarget.inc"
+#include "PPCGenSubtargetInfo.inc"
 
 using namespace llvm;
 
index 2e977076fd2d2c17c9bfa53ebc9551efe046cf3e..33b21dba1ca24146a2b72fe5e40e1997fd2e3982 100644 (file)
@@ -20,7 +20,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "PPCGenSubtarget.inc"
+#include "PPCGenSubtargetInfo.inc"
 
 // GCC #defines PPC on Linux but we use it as our namespace name
 #undef PPC
index f3c691f52641848fc8654199fb93b312295250f0..e1f54fb63ff5b33a9eb8ae3a8d8e8ec01e5d6f42 100644 (file)
@@ -4,7 +4,7 @@ tablegen(SparcGenRegisterInfo.inc -gen-register-info)
 tablegen(SparcGenInstrInfo.inc -gen-instr-info)
 tablegen(SparcGenAsmWriter.inc -gen-asm-writer)
 tablegen(SparcGenDAGISel.inc -gen-dag-isel)
-tablegen(SparcGenSubtarget.inc -gen-subtarget)
+tablegen(SparcGenSubtargetInfo.inc -gen-subtarget)
 tablegen(SparcGenCallingConv.inc -gen-callingconv)
 
 add_llvm_target(SparcCodeGen
index c8741b525b547891446be2a4d20ccaf7882fc19e..89f5053383eb7776f86b5a2eb56879177ad28742 100644 (file)
@@ -13,8 +13,8 @@ TARGET = Sparc
 
 # Make sure that tblgen is run, first thing.
 BUILT_SOURCES = SparcGenRegisterInfo.inc SparcGenInstrInfo.inc \
-               SparcGenAsmWriter.inc \
-                SparcGenDAGISel.inc SparcGenSubtarget.inc SparcGenCallingConv.inc
+               SparcGenAsmWriter.inc SparcGenDAGISel.inc \
+               SparcGenSubtargetInfo.inc SparcGenCallingConv.inc
 
 DIRS = TargetInfo
 
index 3037b44afa5e7cd535d38e734d83f55e3a2b171a..ee3cc03f13a021618b20a47c0bec88a4c27f0226 100644 (file)
@@ -16,7 +16,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "SparcGenSubtarget.inc"
+#include "SparcGenSubtargetInfo.inc"
 
 using namespace llvm;
 
index 48cf2d44f1ed8cea406faa8bb77feb7154a09547..257f22ad461be8fd5adc161cd79b7219c5dabded 100644 (file)
@@ -18,7 +18,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "SparcGenSubtarget.inc"
+#include "SparcGenSubtargetInfo.inc"
 
 namespace llvm {
 
index 47c7a9fe6c621078e82bcfce68a5c4b815922ec0..12206b9718e4fee017b6ef0d1e9745cfef275bd0 100644 (file)
@@ -5,7 +5,7 @@ tablegen(SystemZGenInstrInfo.inc -gen-instr-info)
 tablegen(SystemZGenAsmWriter.inc -gen-asm-writer)
 tablegen(SystemZGenDAGISel.inc -gen-dag-isel)
 tablegen(SystemZGenCallingConv.inc -gen-callingconv)
-tablegen(SystemZGenSubtarget.inc -gen-subtarget)
+tablegen(SystemZGenSubtargetInfo.inc -gen-subtarget)
 
 add_llvm_target(SystemZCodeGen
   SystemZAsmPrinter.cpp
index 682f343046d5fade9148855e826e9f15ca27fcfc..fa59dc6f1d0b1c616e405bd8ff38a0836a7ac18d 100644 (file)
@@ -13,8 +13,8 @@ TARGET = SystemZ
 
 # Make sure that tblgen is run, first thing.
 BUILT_SOURCES = SystemZGenRegisterInfo.inc SystemZGenInstrInfo.inc \
-               SystemZGenAsmWriter.inc \
-                SystemZGenDAGISel.inc SystemZGenSubtarget.inc SystemZGenCallingConv.inc
+               SystemZGenAsmWriter.inc SystemZGenDAGISel.inc \
+               SystemZGenSubtargetInfo.inc SystemZGenCallingConv.inc
 
 DIRS = TargetInfo
 
index 438d4fe3ea56f13331db5b05fab6e32505e8a3c6..4388109fb1149407f1e00e21545967da9cc9b3b2 100644 (file)
@@ -19,7 +19,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "SystemZGenSubtarget.inc"
+#include "SystemZGenSubtargetInfo.inc"
 
 using namespace llvm;
 
index 9bf1f08a07b442ca3150911100a5124f73b1d474..6ac606a53cc0cc59c92b2edeb051d8609124c5fb 100644 (file)
@@ -18,7 +18,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "SystemZGenSubtarget.inc"
+#include "SystemZGenSubtargetInfo.inc"
 
 namespace llvm {
 class GlobalValue;
index 50464e8e9e7d004d9b005dbb87a0ff27bb495ea0..633d9826f7cfe5812dd5d1b5798750679ca91fed 100644 (file)
@@ -9,7 +9,7 @@ tablegen(X86GenAsmMatcher.inc -gen-asm-matcher)
 tablegen(X86GenDAGISel.inc -gen-dag-isel)
 tablegen(X86GenFastISel.inc -gen-fast-isel)
 tablegen(X86GenCallingConv.inc -gen-callingconv)
-tablegen(X86GenSubtarget.inc -gen-subtarget)
+tablegen(X86GenSubtargetInfo.inc -gen-subtarget)
 tablegen(X86GenEDInfo.inc -gen-enhanced-disassembly-info)
 
 set(sources
index b55cfdc2f82cc6d9ac9fe09f2d7c167cdb79d1fd..c7c37f6667678f2a152c4b43070bf549aca8379a 100644 (file)
@@ -24,7 +24,7 @@
 #include "X86GenInstrInfo.inc"
 
 #define GET_SUBTARGETINFO_MC_DESC
-#include "X86GenSubtarget.inc"
+#include "X86GenSubtargetInfo.inc"
 
 using namespace llvm;
 
index 25da36740fba69daded8d579c90fd73a7163a7a8..949661eb99e90c83855c39cea090f2d8bfbfd61d 100644 (file)
@@ -16,7 +16,7 @@ BUILT_SOURCES = X86GenRegisterInfo.inc X86GenInstrInfo.inc \
                X86GenAsmWriter.inc X86GenAsmMatcher.inc \
                 X86GenAsmWriter1.inc X86GenDAGISel.inc  \
                 X86GenDisassemblerTables.inc X86GenFastISel.inc \
-                X86GenCallingConv.inc X86GenSubtarget.inc \
+                X86GenCallingConv.inc X86GenSubtargetInfo.inc \
                X86GenEDInfo.inc
 
 DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc Utils
index 46b50cca25d406f9ffabe17b7724a79ce410e4fb..a1e6d7be984800a26dd7e4499ef08ce744bf5118 100644 (file)
@@ -24,7 +24,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "X86GenSubtarget.inc"
+#include "X86GenSubtargetInfo.inc"
 
 using namespace llvm;
 
index e26e53c85e76ded561aa04c433ecbf7552660530..d49b87177525e1133561711c2a710d45aa014111 100644 (file)
@@ -20,7 +20,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "X86GenSubtarget.inc"
+#include "X86GenSubtargetInfo.inc"
 
 namespace llvm {
 class GlobalValue;
index 358141cab9080ae84d28a2e5e4b542ce4625ae7c..59c7f51cebde07a1ccc84936223bc68383177b73 100644 (file)
@@ -5,7 +5,7 @@ tablegen(XCoreGenInstrInfo.inc -gen-instr-info)
 tablegen(XCoreGenAsmWriter.inc -gen-asm-writer)
 tablegen(XCoreGenDAGISel.inc -gen-dag-isel)
 tablegen(XCoreGenCallingConv.inc -gen-callingconv)
-tablegen(XCoreGenSubtarget.inc -gen-subtarget)
+tablegen(XCoreGenSubtargetInfo.inc -gen-subtarget)
 
 add_llvm_target(XCoreCodeGen
   XCoreAsmPrinter.cpp
index ec6fb4c604080a99b08124b30752724b7389fd65..a9d9feef655d09df580a9df5d638ce508d5026f2 100644 (file)
@@ -15,7 +15,7 @@ TARGET = XCore
 BUILT_SOURCES = XCoreGenRegisterInfo.inc XCoreGenInstrInfo.inc \
                XCoreGenAsmWriter.inc \
                 XCoreGenDAGISel.inc XCoreGenCallingConv.inc \
-               XCoreGenSubtarget.inc
+               XCoreGenSubtargetInfo.inc
 
 DIRS = TargetInfo
 
index d6e2e8ab2af0e9ca1658ebe7d55e168795a88322..6485c4ee6d6470a9bd8ab3d8e55981eccb032202 100644 (file)
@@ -17,7 +17,7 @@
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "XCoreGenSubtarget.inc"
+#include "XCoreGenSubtargetInfo.inc"
 
 using namespace llvm;
 
index 6f7043fe28079ba1e803e4bdf6f7bfb695a4f6ad..2e52571e2a3cf042d43d347b89e83765ca477123 100644 (file)
@@ -19,7 +19,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "XCoreGenSubtarget.inc"
+#include "XCoreGenSubtargetInfo.inc"
 
 namespace llvm {