drm/radeon/kms: fix hdmi duallink checks
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 8 Mar 2012 00:05:01 +0000 (19:05 -0500)
committerDave Airlie <airlied@redhat.com>
Thu, 8 Mar 2012 09:39:54 +0000 (09:39 +0000)
All pre-SI chips are limited to 165 Mhz for single link.
Code in question will be re-enabled when SI support is added.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=44755
https://bugzilla.kernel.org/show_bug.cgi?id=42887

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/radeon_connectors.c
drivers/gpu/drm/radeon/radeon_encoders.c

index 8b3d8ed52ff66051e11b4edaa29d9d1e2bc6df1e..8c9a8115b632b255f3ad5deb2a88c1aee5dfffc6 100644 (file)
@@ -1057,7 +1057,7 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector,
                    (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
                        return MODE_OK;
                else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
-                       if (ASIC_IS_DCE3(rdev)) {
+                       if (0) {
                                /* HDMI 1.3+ supports max clock of 340 Mhz */
                                if (mode->clock > 340000)
                                        return MODE_CLOCK_HIGH;
index 9419c51bcf50f0f98f86cfd8122730ceea70a4d6..26e92708d114a8eb64c4a27996911b3c2a61e73f 100644 (file)
@@ -307,8 +307,6 @@ void radeon_panel_mode_fixup(struct drm_encoder *encoder,
 bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
                                    u32 pixel_clock)
 {
-       struct drm_device *dev = encoder->dev;
-       struct radeon_device *rdev = dev->dev_private;
        struct drm_connector *connector;
        struct radeon_connector *radeon_connector;
        struct radeon_connector_atom_dig *dig_connector;
@@ -326,7 +324,7 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
        case DRM_MODE_CONNECTOR_HDMIB:
                if (radeon_connector->use_digital) {
                        /* HDMI 1.3 supports up to 340 Mhz over single link */
-                       if (ASIC_IS_DCE3(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
+                       if (0 && drm_detect_hdmi_monitor(radeon_connector->edid)) {
                                if (pixel_clock > 340000)
                                        return true;
                                else
@@ -348,7 +346,7 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
                        return false;
                else {
                        /* HDMI 1.3 supports up to 340 Mhz over single link */
-                       if (ASIC_IS_DCE3(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
+                       if (0 && drm_detect_hdmi_monitor(radeon_connector->edid)) {
                                if (pixel_clock > 340000)
                                        return true;
                                else