mfd: cpcap-uc: Add support to control regulators with secondary standby

The uC can now be used to write the secondary SPI standby bits.

Change-Id: I0f6a69d78b941fdf7b65d893c0ae8b29cc8bd740
Signed-off-by: Greg Meiste <w30289@motorola.com>

diff --git a/drivers/mfd/cpcap-uc.c b/drivers/mfd/cpcap-uc.c
index ded4ce12b19a3bbf5d201bf5e4e8aeb186c9b5fd..f554d0464df39af5471c0b387c8fd96883827225 100644 (file)
--- a/drivers/mfd/cpcap-uc.c
+++ b/drivers/mfd/cpcap-uc.c
@@ -40,6 +40,8 @@
 #define RAM_START_ST         0x0000
 #define RAM_END_ST           0x0FFF
 
+#define HWCFG_ADDR_ST        0x0122
+
 enum {
        READ_STATE_1,   /* Send size and location of RAM read. */
        READ_STATE_2,   /*!< Read MT registers. */
@@ -684,6 +686,9 @@ static int fw_load(struct cpcap_uc_data *uc_data, struct device *dev)
        unsigned short num_bytes;
        unsigned short num_words;
        unsigned char odd_bytes;
+       struct cpcap_platform_data *data;
+
+       data = uc_data->cpcap->spi->controller_data;
 
        if (!uc_data || !dev)
                return -EINVAL;
@@ -744,6 +749,12 @@ static int fw_load(struct cpcap_uc_data *uc_data, struct device *dev)
        if (!err) {
                uc_data->is_ready = 1;
 
+               if (uc_data->cpcap->vendor == CPCAP_VENDOR_ST) {
+                       err = ram_write(uc_data, HWCFG_ADDR_ST, CPCAP_HWCFG_NUM,
+                                       data->hwcfg);
+                       dev_info(dev, "Loaded HWCFG data: %d\n", err);
+               }
+
                err = cpcap_uc_start(uc_data->cpcap, CPCAP_MACRO_4);
                dev_info(dev, "Started macro 4: %d\n", err);
        }

diff --git a/firmware/cpcap/firmware_0_2x.HEX b/firmware/cpcap/firmware_0_2x.HEX
index c37fe09042bd7d5965e566c27ae6de20470ad2a1..3d2621f5c8e66c86b9efda171910e6524d3ea0f9 100644 (file)
--- a/firmware/cpcap/firmware_0_2x.HEX
+++ b/firmware/cpcap/firmware_0_2x.HEX
@@ -11,26 +11,33 @@
 :2001A00000000000000000000000000000000000000000000000000000000000000000003F
 :2001C00000000000000000000000000000000000000000000000000000000000000000001F
 :2001E0000000000000000000000000000000000000000000000000000000000000000000FF
-:200200000000000000000000037203830040000000000000000003CA040B04000000008043
+:200200000000000000000000044C045D0040000000000000000004A404E5040000000080D8
 :0402200000040000D6
 :080224000000000000000200D0
-:20023000C6012DCA012C2728A640C7831B725F831AC78327725F832648C78329725F832899
-:20025000A620C7832B725F832AC7832D725F832C4FC7022CC7022DC7022EC7022F720A41F8
-:200270000302AD37720C410321725C022F2604725C022EC6022FC00225C6022EC20224259A
-:2002900009AD5E4FC7022EC7022F720A410203CD033BA6CCAE0CCDF00920C288888888C675
-:2002B00040106B01C640116B02C640126B03C640136B047B01A50427067B03A508260935FF
-:2002D0000102268484848481C6022627F6725F0226C64101CE4100AA20C74101CF41002036
-:2002F000E2C60229CA0228260CC64805C70229CE4804CF0228C60227261255022948055594
-:200310000228480435010227A6032017C64805CE4804A40141A460CF4805C74804725F02FF
-:2003300027A61BC70225725F0224818888C64011C64010A402974F6B0272EF01C1022B26B3
-:20035000069FC1022A27187B02C7022B7B01C7022ACE4101C64100AA20CF4101C74100845E
-:200370008481725F475F3530475EA6CCAE0CCDF00920F788897201475F28C6430BCE430A5D
-:20039000A48041A4F0AA0841AA30C7430BCF430AC64311CE4310A480AA30C74311CF4310E0
-:2003B000200ECE430BC6430AA4F0CF430BC7430A7B02AE01CDF2B6848481C64003CE4002C8
-:2003D000AA80C74003CF4002C64005CE4004AA04C74005CF4004C6400BCE400AA47FC7408B
-:2003F0000BCF400AC6400DCE400CA4FBC7400DCF400CA6CCAE0CCDF00920F78889C64003AB
-:20041000CE4002A480273EC6400BCE400AA47FC7400BCF400AC64003CE4002AA80C740036F
-:20043000CF4002C64013CE4012A480270AC64115CE4114A4BF2008C64115CE4114AA40C753
-:200450004115CF4114C64005CE4004A4042724C6400DCE400CAA04C7400DCF400CC64005ED
-:1D047000CE4004AA04C74005CF4004725F4104725F41057B02AE01CDF2B684848139
+:200230007201012308725F8307352083067203012308725F830B3520830A720501230872DF
+:200250005F830F3501830E7207012308725F831135208310720901230835088315725F8314
+:2002700014720B01230835108401725F8400720D01230835808319725F8318720F0123087D
+:200290003540831B725F831A72010122083580831D725F831C72030122083580831F725FA2
+:2002B000831E720501220835108323725F8322720701220835408327725F832672090122AF
+:2002D0000835808329725F8328720B0122083520832B725F832A720D0122083520832D72DF
+:2002F0005F832C720F01220835808325725F832472010125083540832F725F832E7203019F
+:200310002508725F833135028330720501250835208333725F8332720701250EC68333CE04
+:200330008332AA80C78333CF83324FC7022CC7022DC7022EC7022F720A410302AD37720C80
+:20035000410321725C022F2604725C022EC6022FC00225C6022EC202242509AD5E4FC702F4
+:200370002EC7022F720A410203CD0415A6CCAE0CCDF00920C288888888C640106B01C64023
+:20039000116B02C640126B03C640136B047B01A50427067B03A5082609350102268484842B
+:2003B0008481C6022627F6725F0226C64101CE4100AA20C74101CF410020E2C60229CA026B
+:2003D00028260CC64805C70229CE4804CF0228C602272612550229480555022848043501A6
+:2003F0000227A6032017C64805CE4804A40141A460CF4805C74804725F0227A61BC70225F5
+:20041000725F0224818888C64011C64010A402974F6B0272EF01C1022B26069FC1022A27EF
+:20043000187B02C7022B7B01C7022ACE4101C64100AA20CF4101C74100848481725F475FBA
+:200450003530475EA6CCAE0CCDF00920F788897201475F28C6430BCE430AA48041A4F0AA55
+:200470000841AA30C7430BCF430AC64311CE4310A480AA30C74311CF4310200ECE430BC692
+:20049000430AA4F0CF430BC7430A7B02AE01CDF2B6848481C64003CE4002AA80C74003CFF4
+:2004B0004002C64005CE4004AA04C74005CF4004C6400BCE400AA47FC7400BCF400AC64083
+:2004D0000DCE400CA4FBC7400DCF400CA6CCAE0CCDF00920F78889C64003CE4002A4802799
+:2004F0003EC6400BCE400AA47FC7400BCF400AC64003CE4002AA80C74003CF4002C64013C0
+:20051000CE4012A480270AC64115CE4114A4BF2008C64115CE4114AA40C74115CF4114C65C
+:200530004005CE4004A4042724C6400DCE400CAA04C7400DCF400CC64005CE4004AA04C7C5
+:170550004005CF4004725F4104725F41057B02AE01CDF2B6848481E5
 :00000001FF
\ No newline at end of file

diff --git a/include/linux/spi/cpcap.h b/include/linux/spi/cpcap.h
index 09254e9c921f324dbf58797b26c9b01576ec08be..4b71450cf0ebbaca59ecab7ca4c35715b7f691b8 100644 (file)
--- a/include/linux/spi/cpcap.h
+++ b/include/linux/spi/cpcap.h
@@ -39,6 +39,32 @@
 #define CPCAP_IRQ_INT4_INDEX 48
 #define CPCAP_IRQ_INT5_INDEX 64
 
+#define CPCAP_HWCFG_NUM       2    /* The number of hardware config words. */
+/*
+ * Tell the uC to setup the secondary standby bits for the regulators used.
+ */
+#define CPCAP_HWCFG0_SEC_STBY_SW1       0x0001
+#define CPCAP_HWCFG0_SEC_STBY_SW2       0x0002
+#define CPCAP_HWCFG0_SEC_STBY_SW3       0x0004
+#define CPCAP_HWCFG0_SEC_STBY_SW4       0x0008
+#define CPCAP_HWCFG0_SEC_STBY_SW5       0x0010
+#define CPCAP_HWCFG0_SEC_STBY_VAUDIO    0x0020
+#define CPCAP_HWCFG0_SEC_STBY_VCAM      0x0040
+#define CPCAP_HWCFG0_SEC_STBY_VCSI      0x0080
+#define CPCAP_HWCFG0_SEC_STBY_VDAC      0x0100
+#define CPCAP_HWCFG0_SEC_STBY_VDIG      0x0200
+#define CPCAP_HWCFG0_SEC_STBY_VHVIO     0x0400
+#define CPCAP_HWCFG0_SEC_STBY_VPLL      0x0800
+#define CPCAP_HWCFG0_SEC_STBY_VRF1      0x1000
+#define CPCAP_HWCFG0_SEC_STBY_VRF2      0x2000
+#define CPCAP_HWCFG0_SEC_STBY_VRFREF    0x4000
+#define CPCAP_HWCFG0_SEC_STBY_VSDIO     0x8000
+
+#define CPCAP_HWCFG1_SEC_STBY_VWLAN1    0x0001
+#define CPCAP_HWCFG1_SEC_STBY_VWLAN2    0x0002
+#define CPCAP_HWCFG1_SEC_STBY_VSIM      0x0004
+#define CPCAP_HWCFG1_SEC_STBY_VSIMCARD  0x0008
+
 #define CPCAP_WHISPER_MODE_PU       0x00000001
 #define CPCAP_WHISPER_ENABLE_UART   0x00000002
 #define CPCAP_WHISPER_ACCY_MASK     0xF8000000
@@ -546,6 +572,7 @@ struct cpcap_platform_data {
                             struct cpcap_batt_data *);
        void (*usb_changed)(struct power_supply *,
                            struct cpcap_batt_usb_data *);
+       u16 hwcfg[CPCAP_HWCFG_NUM];
 };
 
 struct cpcap_whisper_pdata {