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Fix the assembly opcode on LOADLoAddr, courtesy of Nate Begeman.
author
Misha Brukman
<brukman+llvm@gmail.com>
Mon, 28 Jun 2004 18:27:08 +0000
(18:27 +0000)
committer
Misha Brukman
<brukman+llvm@gmail.com>
Mon, 28 Jun 2004 18:27:08 +0000
(18:27 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14470
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/PowerPC/PPCInstrInfo.td
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diff --git
a/lib/Target/PowerPC/PPCInstrInfo.td
b/lib/Target/PowerPC/PPCInstrInfo.td
index ebeab0ce4eb594565ab8ce1f69878fe3701d3ea1..a3ee3e0fc4fee6725d6c89950fdb6cccf8f7e922 100644
(file)
--- a/
lib/Target/PowerPC/PPCInstrInfo.td
+++ b/
lib/Target/PowerPC/PPCInstrInfo.td
@@
-1263,7
+1263,7
@@
def ADJCALLSTACKDOWN : PPC32InstPatternPseudo<"ADJCALLSTACKDOWN", Pseudo>;
def ADJCALLSTACKUP : PPC32InstPatternPseudo<"ADJCALLSTACKUP", Pseudo>;
def MovePCtoLR : PPC32InstPatternPseudo<"MovePCtoLR", Pseudo>;
-def LOADLoAddr : PPC32InstPattern0 <"
addi
", Gpr, Gpr0, Simm16, 14, 0, 0>;
+def LOADLoAddr : PPC32InstPattern0 <"
lwz
", Gpr, Gpr0, Simm16, 14, 0, 0>;
def LOADHiAddr : PPC32InstPattern0 <"addis", Gpr, Gpr0, Simm16, 15, 0, 0>;
def ADDI : PPC32InstPattern0 <"addi", Gpr, Gpr0, Simm16, 14, 0, 0>;