///
void setCurDebugLoc(DebugLoc dl) { DL = dl; }
+ /// getCurDebugLoc() - Return current debug location information.
+ DebugLoc getCurDebugLoc() const { return DL; }
+
/// SelectInstruction - Do "fast" instruction selection for the given
/// LLVM IR instruction, and append generated machine instructions to
/// the current block. Return true if selection was successful.
SDValue getControlRoot();
DebugLoc getCurDebugLoc() const { return CurDebugLoc; }
+ void setCurDebugLoc(DebugLoc dl) { CurDebugLoc = dl; }
void CopyValueToVirtualRegister(Value *V, unsigned Reg);
const char *implVisitBinaryAtomic(CallInst& I, ISD::NodeType Op);
const char *implVisitAluOverflow(CallInst &I, ISD::NodeType Op);
-
- void setCurDebugLoc(DebugLoc dl) { CurDebugLoc = dl; }
};
/// AddCatchInfo - Extract the personality and type infos from an eh.selector
R = FuncInfo->CreateRegForValue(BI);
}
+ SDL->setCurDebugLoc(FastIS->getCurDebugLoc());
SelectBasicBlock(LLVMBB, BI, next(BI));
// If the instruction was codegen'd with multiple blocks,
// inform the FastISel object where to resume inserting.
// Run SelectionDAG instruction selection on the remainder of the block
// not handled by FastISel. If FastISel is not run, this is the entire
// block.
- if (BI != End)
+ if (BI != End) {
+ // If FastISel is run and it has known DebugLoc then use it.
+ if (FastIS && !FastIS->getCurDebugLoc().isUnknown())
+ SDL->setCurDebugLoc(FastIS->getCurDebugLoc());
SelectBasicBlock(LLVMBB, BI, End);
+ }
FinishBasicBlock();
}