Tidy up the ScheduleDAG class definition a little. Make a few

more member functions protected, and group all the protected
members together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63932 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index ed7d3ed4022035128154747faed7108063491da6..1d582d3c747c070ae2bb0c63f315bbadca49596d 100644 (file)
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -446,30 +446,10 @@ namespace llvm {
              MachineBasicBlock::iterator Begin,
              MachineBasicBlock::iterator End);
 
-    /// BuildSchedGraph - Build SUnits and set up their Preds and Succs
-    /// to form the scheduling dependency graph.
-    ///
-    virtual void BuildSchedGraph() = 0;
-
-    /// ComputeLatency - Compute node latency.
-    ///
-    virtual void ComputeLatency(SUnit *SU) = 0;
-
-  protected:
-    /// EmitNoop - Emit a noop instruction.
-    ///
-    void EmitNoop();
-
-  public:
     virtual MachineBasicBlock *EmitSchedule() = 0;
 
     void dumpSchedule() const;
 
-    /// Schedule - Order nodes according to selected style, filling
-    /// in the Sequence member.
-    ///
-    virtual void Schedule() = 0;
-
     virtual void dumpNode(const SUnit *SU) const = 0;
 
     /// getGraphNodeLabel - Return a label for an SUnit node in a visualization
@@ -487,15 +467,33 @@ namespace llvm {
 #endif
 
   protected:
-    void AddMemOperand(MachineInstr *MI, const MachineMemOperand &MO);
+    /// BuildSchedGraph - Build SUnits and set up their Preds and Succs
+    /// to form the scheduling dependency graph.
+    ///
+    virtual void BuildSchedGraph() = 0;
 
-    void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap);
+    /// ComputeLatency - Compute node latency.
+    ///
+    virtual void ComputeLatency(SUnit *SU) = 0;
+
+    /// Schedule - Order nodes according to selected style, filling
+    /// in the Sequence member.
+    ///
+    virtual void Schedule() = 0;
 
     /// ForceUnitLatencies - Return true if all scheduling edges should be given a
     /// latency value of one.  The default is to return false; schedulers may
     /// override this as needed.
     virtual bool ForceUnitLatencies() const { return false; }
 
+    /// EmitNoop - Emit a noop instruction.
+    ///
+    void EmitNoop();
+
+    void AddMemOperand(MachineInstr *MI, const MachineMemOperand &MO);
+
+    void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap);
+
   private:
     /// EmitLiveInCopy - Emit a copy for a live in physical register. If the
     /// physical register has only a single copy use, then coalesced the copy