Consider 64-bit registers to be FP as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18432 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index 89842a4e9f11e506d87929f0eda637beba65746b..b1336f74d91a88b1c51f625b5e46eb161b398552 100644 (file)
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -815,7 +815,9 @@ void X86ISel::InsertFPRegKills() {
       MachineBasicBlock *SBB = *SI;
       for (MachineBasicBlock::iterator I = SBB->begin();
            I != SBB->end() && I->getOpcode() == X86::PHI; ++I) {
-        if (RegMap.getRegClass(I->getOperand(0).getReg())->getSize() == 10)
+        const TargetRegisterClass *RC =
+          RegMap.getRegClass(I->getOperand(0).getReg());
+        if (RC->getSize() == 10 || RC->getSize() == 8)
           goto UsesFPReg;
       }
     }