--- /dev/null
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pinctrl/rockchip-rk3188.h>
+
+/ {
+ pinctrl@20008000 {
+ compatible = "rockchip,rk3188-pinctrl";
+ reg = <0x20008000 0xa0>,
+ <0x20008164 0x1a0>;
+ reg-names = "base", "pull";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio0: gpio0@0x2000a000 {
+ compatible = "rockchip,rk3188-gpio-bank0";
+ reg = <0x2000a000 0x100>,
+ <0x20004064 0x8>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ /*clocks = <&clk_gates8 9>;*/
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio1: gpio1@0x2003c000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x2003c000 0x100>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ /*clocks = <&clk_gates8 10>;*/
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio2: gpio2@2003e000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x2003e000 0x100>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ /*clocks = <&clk_gates8 11>;*/
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio3: gpio3@20080000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x20080000 0x100>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ /*clocks = <&clk_gates8 12>;*/
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pcfg_pull_up: pcfg_pull_up {
+ bias-pull-up;
+ };
+
+ pcfg_pull_down: pcfg_pull_down {
+ bias-pull-down;
+ };
+
+ pcfg_pull_none: pcfg_pull_none {
+ bias-disable;
+ };
+
+ uart0 {
+ uart0_xfer: uart0-xfer {
+ rockchip,pins = <UART0_SIN>,
+ <UART0_SOUT>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ uart0_cts: uart0-cts {
+ rockchip,pins = <UART0_CTSN>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ uart0_rts: uart0-rts {
+ rockchip,pins = <UART0_RTSN>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+ uart1 {
+ uart1_xfer: uart1-xfer {
+ rockchip,pins = <UART1_SIN>,
+ <UART1_SOUT>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ uart1_cts: uart1-cts {
+ rockchip,pins = <UART1_CTSN>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ uart1_rts: uart1-rts {
+ rockchip,pins = <UART1_RTSN>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+ uart2 {
+ uart2_xfer: uart2-xfer {
+ rockchip,pins = <UART2_SIN>,
+ <UART2_SOUT>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ /* no rts / cts for uart2 */
+ };
+
+ uart3 {
+ uart3_xfer: uart3-xfer {
+ rockchip,pins = <UART3_SIN>,
+ <UART3_SOUT>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ uart3_cts: uart3-cts {
+ rockchip,pins = <UART3_CTSN>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ uart3_rts: uart3-rts {
+ rockchip,pins = <UART3_RTSN>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+ i2c0 {
+ i2c0_sda:i2c0-sda {
+ rockchip,pins = <I2C0_SDA>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ i2c0_scl:i2c0-scl {
+ rockchip,pins = <I2C0_SCL>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+ i2c1 {
+ i2c1_sda:i2c1-sda {
+ rockchip,pins = <I2C1_SDA>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ i2c1_scl:i2c1-scl {
+ rockchip,pins = <I2C1_SCL>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+ i2c2 {
+ i2c2_sda:i2c2-sda {
+ rockchip,pins = <I2C2_SDA>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ i2c2_scl:i2c2-scl {
+ rockchip,pins = <I2C2_SCL>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+ i2c3 {
+ i2c3_sda:i2c3-sda {
+ rockchip,pins = <I2C3_SDA>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ i2c3_scl:i2c3-scl {
+ rockchip,pins = <I2C3_SCL>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+ i2c4 {
+ i2c4_sda:i2c4-sda {
+ rockchip,pins = <I2C4_SDA>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ i2c4_scl:i2c4-scl {
+ rockchip,pins = <I2C4_SCL>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+ spi0 {
+ spi0_txd:spi0-txd {
+ rockchip,pins = <SPI0_TXD>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ spi0_rxd:spi0-rxd {
+ rockchip,pins = <SPI0_RXD>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ spi0_clk:spi0-clk {
+ rockchip,pins = <SPI0_CLK>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ spi0_cs0:spi0-cs0 {
+ rockchip,pins = <SPI0_CS0>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ spi0_cs1:spi0-cs1 {
+ rockchip,pins = <SPI0_CS1>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ };
+
+ spi1 {
+ spi1_txd:spi1-txd {
+ rockchip,pins = <SPI1_TXD>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ spi1_rxd:spi1-rxd {
+ rockchip,pins = <SPI1_RXD>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ spi1_clk:spi1-clk {
+ rockchip,pins = <SPI1_CLK>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ spi1_cs0:spi1-cs0 {
+ rockchip,pins = <SPI1_CS0>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ spi1_cs1:spi1-cs1 {
+ rockchip,pins = <SPI1_CS1>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ };
+
+ i2s0 {
+
+ i2s0_mclk:i2s0-mclk {
+ rockchip,pins = <I2S0_MCLK>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
+
+ i2s0_sclk:i2s0-sclk {
+ rockchip,pins = <I2S0_SCLK>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
+
+ i2s0_lrckrx:i2s0-lrckrx {
+ rockchip,pins = <I2S0_LRCKRX>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
+
+ i2s0_lrcktx:i2s0-lrcktx {
+ rockchip,pins = <I2S0_LRCKTX>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
+
+ i2s0_sdo:i2s0-sdo {
+ rockchip,pins = <I2S0_SDO>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
+
+ i2s0_sdi:i2s0-sdi {
+ rockchip,pins = <I2S0_SDI>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
+
+ };
+
+
+ pwm {
+ pwm0:pwm0 {
+ rockchip,pins = <PWM0>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
+
+
+ pwm1:pwm1 {
+ rockchip,pins = <PWM1>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+
+ pwm2:pwm2 {
+ rockchip,pins = <PWM2>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+
+ pwm3:pwm3 {
+ rockchip,pins = <PWM3>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ };
+
+
+ sd0 {
+ sd0_clk: sd0-clk {
+ rockchip,pins = <MMC0_CLKOUT>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd0_cmd: sd0-cmd {
+ rockchip,pins = <MMC0_CMD>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd0_cd: sd0-cd {
+ rockchip,pins = <MMC0_DETN>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd0_wp: sd0-wp {
+ rockchip,pins = <MMC0_WRPRT>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd0_pwr: sd0-pwr {
+ rockchip,pins = <MMC0_PWREN>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd0_bus1: sd0-bus-width1 {
+ rockchip,pins = <MMC0_D0>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd0_bus4: sd0-bus-width4 {
+ rockchip,pins = <MMC0_D0>,
+ <MMC0_D1>,
+ <MMC0_D2 >,
+ <MMC0_D3>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+
+ sd1 {
+ sd1_clk: sd1-clk {
+ rockchip,pins = <MMC1_CLKOUT>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd1_cmd: sd1-cmd {
+ rockchip,pins = <MMC1_CMD>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd1_cd: sd1-cd {
+ rockchip,pins = <MMC1_DETN>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd1_wp: sd1-wp {
+ rockchip,pins = <MMC1_WRPRT>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd1_bus1: sd1-bus-width1 {
+ rockchip,pins = <MMC1_D0>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ sd1_bus4: sd1-bus-width4 {
+ rockchip,pins = <MMC1_D0>,
+ <MMC1_D1>,
+ <MMC1_D2>,
+ <MMC1_D3>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+
+ gps {
+ gps_mag:gps-mag {
+ rockchip,pins = <GPS_MAG>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
+
+ gps_sig:gps-sig {
+ rockchip,pins = <GPS_SIG>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
+
+
+ gps_rfclk:gps-rfclk {
+ rockchip,pins = <GPS_RFCLK>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
+
+ };
+
+
+
+ //to add
+ };
+};
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/pinctrl/rockchip-rk3188.h>
#include "skeleton.dtsi"
+#include "rk3188-pinctrl.dtsi"
+
/ {
compatible = "rockchip,rk3188";
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
};
- pinctrl@20008000 {
- compatible = "rockchip,rk3188-pinctrl";
- reg = <0x20008000 0xa0>,
- <0x20008164 0x1a0>;
- reg-names = "base", "pull";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio0: gpio0@0x2000a000 {
- compatible = "rockchip,rk3188-gpio-bank0";
- reg = <0x2000a000 0x100>,
- <0x20004064 0x8>;
- interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
- /*clocks = <&clk_gates8 9>;*/
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio1: gpio1@0x2003c000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x2003c000 0x100>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- /*clocks = <&clk_gates8 10>;*/
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio2: gpio2@2003e000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x2003e000 0x100>;
- interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
- /*clocks = <&clk_gates8 11>;*/
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio3: gpio3@20080000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x20080000 0x100>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
- /*clocks = <&clk_gates8 12>;*/
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pcfg_pull_up: pcfg_pull_up {
- bias-pull-up;
- };
-
- pcfg_pull_down: pcfg_pull_down {
- bias-pull-down;
- };
-
- pcfg_pull_none: pcfg_pull_none {
- bias-disable;
- };
-
- uart0 {
- uart0_xfer: uart0-xfer {
- rockchip,pins = <UART0_SIN &pcfg_pull_none>,
- <UART0_SOUT &pcfg_pull_none>;
- };
-
- uart0_cts: uart0-cts {
- rockchip,pins = <UART0_CTSN &pcfg_pull_none>;
- };
-
- uart0_rts: uart0-rts {
- rockchip,pins = <UART0_RTSN &pcfg_pull_none>;
- };
- };
-
- uart1 {
- uart1_xfer: uart1-xfer {
- rockchip,pins = <UART1_SIN &pcfg_pull_none>,
- <UART1_SOUT &pcfg_pull_none>;
- };
-
- uart1_cts: uart1-cts {
- rockchip,pins = <UART1_CTSN &pcfg_pull_none>;
- };
-
- uart1_rts: uart1-rts {
- rockchip,pins = <UART1_RTSN &pcfg_pull_none>;
- };
- };
-
- uart2 {
- uart2_xfer: uart2-xfer {
- rockchip,pins = <UART2_SIN &pcfg_pull_none>,
- <UART2_SOUT &pcfg_pull_none>;
- };
- /* no rts / cts for uart2 */
- };
-
- uart3 {
- uart3_xfer: uart3-xfer {
- rockchip,pins = <UART3_SIN &pcfg_pull_none>,
- <UART3_SOUT &pcfg_pull_none>;
- };
-
- uart3_cts: uart3-cts {
- rockchip,pins = <UART3_CTSN &pcfg_pull_none>;
- };
-
- uart3_rts: uart3-rts {
- rockchip,pins = <UART3_RTSN &pcfg_pull_none>;
- };
- };
-
- sd0 {
- sd0_clk: sd0-clk {
- rockchip,pins = <MMC0_CLKOUT &pcfg_pull_none>;
- };
-
- sd0_cmd: sd0-cmd {
- rockchip,pins = <MMC0_CMD &pcfg_pull_none>;
- };
-
- sd0_cd: sd0-cd {
- rockchip,pins = <MMC0_DETN &pcfg_pull_none>;
- };
-
- sd0_wp: sd0-wp {
- rockchip,pins = <MMC0_WRPRT &pcfg_pull_none>;
- };
-
- sd0_pwr: sd0-pwr {
- rockchip,pins = <MMC0_PWREN &pcfg_pull_none>;
- };
-
- sd0_bus1: sd0-bus-width1 {
- rockchip,pins = <MMC0_D0 &pcfg_pull_none>;
- };
-
- sd0_bus4: sd0-bus-width4 {
- rockchip,pins = <MMC0_D0 &pcfg_pull_none>,
- <MMC0_D1 &pcfg_pull_none>,
- <MMC0_D2 &pcfg_pull_none>,
- <MMC0_D3 &pcfg_pull_none>;
- };
- };
-
- sd1 {
- sd1_clk: sd1-clk {
- rockchip,pins = <MMC1_CLKOUT &pcfg_pull_none>;
- };
-
- sd1_cmd: sd1-cmd {
- rockchip,pins = <MMC1_CMD &pcfg_pull_none>;
- };
-
- sd1_cd: sd1-cd {
- rockchip,pins = <MMC1_DETN &pcfg_pull_none>;
- };
-
- sd1_wp: sd1-wp {
- rockchip,pins = <MMC1_WRPRT &pcfg_pull_none>;
- };
-
- sd1_bus1: sd1-bus-width1 {
- rockchip,pins = <MMC1_D0 &pcfg_pull_none>;
- };
-
- sd1_bus4: sd1-bus-width4 {
- rockchip,pins = <MMC1_D0 &pcfg_pull_none>,
- <MMC1_D1 &pcfg_pull_none>,
- <MMC1_D2 &pcfg_pull_none>,
- <MMC1_D3 &pcfg_pull_none>;
- };
- };
- };
-
-
uart0: serial@10124000 {
compatible = "rockchip,serial";
reg = <0x10124000 0x100>;
#include <linux/clk.h>
#include <dt-bindings/pinctrl/rockchip.h>
+
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/slab.h>
+
+
#include "core.h"
#include "pinconf.h"
/* create config map */
new_map++;
for (i = 0; i < grp->npins; i++) {
- new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN;
- new_map[i].data.configs.group_or_pin =
- pin_get_name(pctldev, grp->pins[i]);
+ new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
+ new_map[i].data.configs.group_or_pin = grp->name;
+ //pin_get_name(pctldev, grp->pins[i]);
new_map[i].data.configs.configs = grp->data[i].configs;
new_map[i].data.configs.num_configs = grp->data[i].nconfigs;
}
int rc;
- param = pinconf_to_config_param(configs);
- arg = pinconf_to_config_argument(configs);
+ param = pinconf_to_config_param(configs);
+ arg = pinconf_to_config_argument(configs);
- switch (param) {
- case PIN_CONFIG_BIAS_DISABLE:
- rc = rockchip_set_pull(bank, pin - bank->pin_base,
- param);
- if (rc)
- return rc;
- break;
- case PIN_CONFIG_BIAS_PULL_UP:
- case PIN_CONFIG_BIAS_PULL_DOWN:
- case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
- case PIN_CONFIG_BIAS_BUS_HOLD:
- if (!rockchip_pinconf_pull_valid(info->ctrl, param))
- return -ENOTSUPP;
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ rc = rockchip_set_pull(bank, pin - bank->pin_base,
+ param);
+ if (rc)
+ return rc;
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
+ case PIN_CONFIG_BIAS_BUS_HOLD:
+ if (!rockchip_pinconf_pull_valid(info->ctrl, param))
+ return -ENOTSUPP;
- if (!arg)
- return -EINVAL;
+ if (!arg)
+ return -EINVAL;
- rc = rockchip_set_pull(bank, pin - bank->pin_base,
- param);
- if (rc)
- return rc;
- break;
- default:
- return -ENOTSUPP;
- break;
- }
+ rc = rockchip_set_pull(bank, pin - bank->pin_base,
+ param);
+ if (rc)
+ return rc;
+ break;
+
+ case PIN_CONFIG_POWER_SOURCE:
+ //to do
+ break;
+
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ //to do
+ break;
+ case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
+ //to do
+ break;
+ default:
+ return -ENOTSUPP;
+ break;
+ }
DBG_PINCTRL("%s,pin=%d,param=%d\n",__func__,pin, param);
*config = 1;
break;
+
+ case PIN_CONFIG_POWER_SOURCE:
+ //to do
+ break;
+
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ //to do
+ break;
+ case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
+ //to do
+ break;
+
default:
return -ENOTSUPP;
break;
}
- DBG_PINCTRL("%s:param=%d\n",__func__, param);
+ DBG_PINCTRL("%s:pin=%d, param=%d\n",__func__, pin, param);
+
+ return 0;
+}
+
+/* set the pin config settings for a specified pin group */
+static int rockchip_pinconf_group_set(struct pinctrl_dev *pctldev,
+ unsigned group, unsigned long config)
+{
+ struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
+ const unsigned int *pins;
+ unsigned int cnt;
+
+ DBG_PINCTRL("%s:group[%d]:%s\n",__func__, group, info->groups[group].name);
+ pins = info->groups[group].pins;
+
+ for (cnt = 0; cnt < info->groups[group].npins; cnt++)
+ rockchip_pinconf_set(pctldev, pins[cnt], config);
+
+ return 0;
+}
+
+/* get the pin config settings for a specified pin group */
+static int rockchip_pinconf_group_get(struct pinctrl_dev *pctldev,
+ unsigned int group, unsigned long *config)
+{
+ struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
+ const unsigned int *pins;
+
+ pins = info->groups[group].pins;
+ rockchip_pinconf_get(pctldev, pins[0], config);
+ DBG_PINCTRL("%s:group[%d]:%s\n",__func__, group, info->groups[group].name);
return 0;
}
+static void rockchip_pinconf_dbg_show(struct pinctrl_dev *pctldev,
+ struct seq_file *s, unsigned pin)
+{
+ //to do
+}
+
+static void rockchip_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
+ struct seq_file *s, unsigned group)
+{
+ //to do
+}
+
+
static const struct pinconf_ops rockchip_pinconf_ops = {
.pin_config_get = rockchip_pinconf_get,
.pin_config_set = rockchip_pinconf_set,
+ .pin_config_group_get = rockchip_pinconf_group_get,
+ .pin_config_group_set = rockchip_pinconf_group_set,
+ .pin_config_dbg_show = rockchip_pinconf_dbg_show,
+ .pin_config_group_dbg_show = rockchip_pinconf_group_dbg_show,
};
static const struct of_device_id rockchip_bank_match[] = {
}
static int rockchip_pinctrl_parse_groups(struct device_node *np,
- struct rockchip_pin_group *grp,
- struct rockchip_pinctrl *info,
- u32 index)
+ struct rockchip_pin_group *grp,
+ struct rockchip_pinctrl *info,
+ u32 index)
{
- struct rockchip_pin_bank *bank;
- int size;
- const __be32 *list;
- int num;
- int i, j;
- int ret;
+ struct rockchip_pin_bank *bank;
+ int size;
+ const __be32 *list;
+ int i, j;
struct union_mode m;
+ int configlen = 0;
+ unsigned long *pinconfig;
+ u32 val;
-
DBG_PINCTRL("%s:group(%d): %s\n", __func__, index, np->name);
- /* Initialise group */
- grp->name = np->name;
-
- /*
- * the binding format is rockchip,pins = <bank pin mux CONFIG>,
- * do sanity check and calculate pins number
- */
- list = of_get_property(np, "rockchip,pins", &size);
- /* we do not check return since it's safe node passed down */
- size /= sizeof(*list);
- if (!size) {
- dev_err(info->dev, "wrong pins number size=%d\n",size);
- return -EINVAL;
- }
-
- grp->npins = size / 4;
-
- grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
- GFP_KERNEL);
- grp->data = devm_kzalloc(info->dev, grp->npins *
- sizeof(struct rockchip_pin_config),
- GFP_KERNEL);
-
- if (!grp->pins || !grp->data)
- return -ENOMEM;
-
- for (i = 0, j = 0; i < size; i += 4, j++) {
- const __be32 *phandle;
- struct device_node *np_config;
-#if 0
- num = be32_to_cpu(*list++);
- bank = bank_num_to_bank(info, num);
- if (IS_ERR(bank))
- return PTR_ERR(bank);
-
- grp->pins[j] = bank->pin_base + be32_to_cpu(*list++);
- grp->data[j].func = be32_to_cpu(*list++);
-#else
+ /* Initialise group */
+ grp->name = np->name;
+
+ /*
+ * the binding format is rockchip,pins = <bank pin mux CONFIG>,
+ * do sanity check and calculate pins number
+ */
+ list = of_get_property(np, "rockchip,pins", &size);
+ /* we do not check return since it's safe node passed down */
+ size /= sizeof(*list);
+ if (!size || size % 1) {
+ dev_err(info->dev, "wrong pins number or pins and configs should be by 1\n");
+ return -EINVAL;
+ }
+
+ grp->npins = size / 1;
+
+ grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
+ GFP_KERNEL);
+ grp->data = devm_kzalloc(info->dev, grp->npins *
+ sizeof(struct rockchip_pin_config),
+ GFP_KERNEL);
+ if (!grp->pins || !grp->data)
+ return -ENOMEM;
+
+ pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
+
+ for (i = 0; i < size; i++) {
m.mode = be32_to_cpu(*list++);
-
+
bank = bank_num_to_bank(info, m.mux.bank);
if (IS_ERR(bank))
return PTR_ERR(bank);
+
+ grp->pins[i] = bank->pin_base + (m.mux.goff - 0x0A) * 8 + m.mux.off;
+ grp->data[i].func = m.mode;
- grp->pins[j] = bank->pin_base + (m.mux.goff - 0x0A) * 8 + m.mux.off;
- grp->data[j].func = m.mode;
-#endif
- phandle = list++;
- if (!phandle)
- return -EINVAL;
+
+ j = 0;
+ configlen = 0;
+
+ if (of_find_property(np, "rockchip,pull", NULL))
+ configlen++;
+ if (of_find_property(np, "rockchip,voltage", NULL))
+ configlen++;
+ if (of_find_property(np, "rockchip,drive", NULL))
+ configlen++;
+ if (of_find_property(np, "rockchip,tristate", NULL))
+ configlen++;
+
+ pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
+
+ if (!of_property_read_u32(np, "allwinner,pull", &val)) {
+ enum pin_config_param pull = PIN_CONFIG_END;
+ if (val == 1)
+ pull = PIN_CONFIG_BIAS_PULL_UP;
+ else if (val == 2)
+ pull = PIN_CONFIG_BIAS_PULL_DOWN;
+
+ pinconfig[j++] = pinconf_to_config_packed(pull, 0);
+ }
- np_config = of_find_node_by_phandle(be32_to_cpup(phandle));
- ret = pinconf_generic_parse_dt_config(np_config,
- &grp->data[j].configs, &grp->data[j].nconfigs);
- if (ret)
- return ret;
- }
+ if (!of_property_read_u32(np, "rockchip,voltage", &val)) {
+ pinconfig[j++] =
+ pinconf_to_config_packed(PIN_CONFIG_POWER_SOURCE,
+ val);
+ }
- return 0;
+ if (!of_property_read_u32(np, "rockchip,drive", &val)) {
+ pinconfig[j++] =
+ pinconf_to_config_packed(PIN_CONFIG_DRIVE_STRENGTH,
+ val);
+ }
+
+ if (!of_property_read_u32(np, "rockchip,tristate", &val)) {
+ pinconfig[j++] =
+ pinconf_to_config_packed(PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
+ val);
+ }
+
+ grp->data[i].configs = pinconfig;
+ grp->data[i].nconfigs = configlen;
+
+ }
+
+ return 0;
}
+
static int rockchip_pinctrl_parse_functions(struct device_node *np,
struct rockchip_pinctrl *info,
u32 index)
{
struct rockchip_pin_ctrl *ctrl = info->ctrl;
struct rockchip_pin_bank *bank = ctrl->pin_banks;
- unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
+ //unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
int i;
for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
return ctrl;
}
-
+#if 0
static irqreturn_t pinctrl_interrupt_test(int irq, void *dev_id)
{
printk("%s:line=%d\n",__func__, __LINE__);
return IRQ_HANDLED;
}
-
+#endif
static int rockchip_pinctrl_probe(struct platform_device *pdev)
{
struct rockchip_pinctrl *info;
projects / firefly-linux-kernel-4.4.55.git / commitdiff