pinctrl: baytrail: Clear DIRECT_IRQ bit
authorLoic Poulain <loic.poulain@intel.com>
Fri, 26 Sep 2014 14:14:51 +0000 (16:14 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 20 Oct 2014 07:05:05 +0000 (09:05 +0200)
Direct irq en bit should be cleared for pads using io mode.
If not, the io based irq will never be detected.
However, this bit can sometimes be misconfigured (BIOS issue).
Force clearing of this bit in io mode and trigger a WARN.

Signed-off-by: Loic Poulain <loic.poulain@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-baytrail.c

index e12e5b07f6d751aba9cce63cf49d2acabe50b7ab..b83ec87c71fe91199253d9ef2af67700c2d375a9 100644 (file)
@@ -227,10 +227,14 @@ static int byt_irq_type(struct irq_data *d, unsigned type)
        spin_lock_irqsave(&vg->lock, flags);
        value = readl(reg);
 
+       WARN(value & BYT_DIRECT_IRQ_EN,
+               "Bad pad config for io mode, force direct_irq_en bit clearing");
+
        /* For level trigges the BYT_TRIG_POS and BYT_TRIG_NEG bits
         * are used to indicate high and low level triggering
         */
-       value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL);
+       value &= ~(BYT_DIRECT_IRQ_EN | BYT_TRIG_POS | BYT_TRIG_NEG |
+                  BYT_TRIG_LVL);
 
        switch (type) {
        case IRQ_TYPE_LEVEL_HIGH: