}
/* Work around CRU_CLKGATE3_CON bit21~20 bug */
-static volatile u32 cru_clkgate3_con_mirror;
+volatile u32 cru_clkgate3_con_mirror;
static int gate_mode(struct clk *clk, int on)
{
#define CRU_SOFTRST1_CON 0x70
#define CRU_SOFTRST2_CON 0x74
+extern volatile u32 cru_clkgate3_con_mirror;
void cru_set_soft_reset(enum cru_soft_reset idx, bool on);
#endif
clkgate[0] = cru_readl(CRU_CLKGATE0_CON);
clkgate[1] = cru_readl(CRU_CLKGATE1_CON);
clkgate[2] = cru_readl(CRU_CLKGATE2_CON);
- clkgate[3] = cru_readl(CRU_CLKGATE3_CON);
+ clkgate[3] = cru_clkgate3_con_mirror;
cru_writel(~((1 << CLK_GATE_CORE)
| (1 << CLK_GATE_ACLK_CPU)
| (1 << CLK_GATE_ACLK_CPU2)