UPSTREAM: drm: bridge: dw-hdmi: Assert SVSRET before resetting the PHY

According to the PHY IP core vendor, the SVSRET signal must be asserted
before resetting the PHY. Tests on RK3288 and R-Car Gen3 showed no
regression, the change should thus be safe.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-20-laurent.pinchart+renesas@ideasonboard.com
Change-Id: I41d4ae5fe19266c430589a254ed1e44120d30ee8
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry pick from 2668db37888ff63282147b00dcf54fa491831df3)

diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c
index 44e7012adbdc5e2e8717443d2ea38b4f72610791..0fe31e216814c596c7dc97a8a86ac5e2a7a3cde0 100644 (file)
--- a/drivers/gpu/drm/bridge/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
@@ -1249,6 +1249,10 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon)
                drm_scdc_writeb(hdmi->ddc, SCDC_TMDS_CONFIG, tmds_cfg);
        }
 
+       /* Leave low power consumption mode by asserting SVSRET. */
+       if (hdmi->phy->has_svsret)
+               dw_hdmi_phy_enable_svsret(hdmi, 1);
+
        /* PHY reset. The reset signal is active high on Gen2 PHYs. */
        hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
        hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
@@ -1306,10 +1310,6 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon)
        dw_hdmi_phy_gen2_txpwron(hdmi, 1);
        dw_hdmi_phy_gen2_pddq(hdmi, 0);
 
-       /* The DWC MHL and HDMI 2.0 PHYs need the SVSRET signal to be set. */
-       if (hdmi->phy->has_svsret)
-               dw_hdmi_phy_enable_svsret(hdmi, 1);
-
        /* Wait for PHY PLL lock */
        msec = 5;
        do {