rk3188: gpu use switch pll to support 594M at gpll, change cpll to 798M

diff --git a/arch/arm/mach-rk3188/clock_data.c b/arch/arm/mach-rk3188/clock_data.c
index 72da5601d357a911d9216286a96214576b28511e..c79168aa50d3a35dd384a9655a88d02c3e745f5b 100755 (executable)
--- a/arch/arm/mach-rk3188/clock_data.c
+++ b/arch/arm/mach-rk3188/clock_data.c
@@ -1375,7 +1375,7 @@ static struct clk aclk_gpu = {
        .mode           = gate_mode,
        .recalc         = clksel_recalc_div,
        .round_rate     = clk_freediv_round_autosel_parents_rate,
-       .set_rate       = clksel_set_rate_freediv,
+       .set_rate       = clkset_rate_freediv_autosel_parents,
        .clksel_con     = CRU_CLKSELS_CON(34),
        .gate_idx       = CLK_GATE_ACLK_GPU,
        CRU_DIV_SET(0x1f, 0, 32),

diff --git a/arch/arm/mach-rk3188/include/mach/board.h b/arch/arm/mach-rk3188/include/mach/board.h
index 294f021625c919cf3cc8c24abac5bb2be32b2f99..028ade179a46d4eaf37340382808257e9696b81f 100644 (file)
--- a/arch/arm/mach-rk3188/include/mach/board.h
+++ b/arch/arm/mach-rk3188/include/mach/board.h
@@ -76,9 +76,9 @@ enum _codec_pll {
 #if (RK30_CLOCKS_DEFAULT_FLAGS&CLK_FLG_UART_1_3M)
 #define codec_pll_default codec_pll_768mhz
 #else
-#define codec_pll_default codec_pll_1200mhz
+#define codec_pll_default codec_pll_798mhz
 #endif
-#define periph_pll_default periph_pll_297mhz
+#define periph_pll_default periph_pll_594mhz
 
 #endif