#define OUT_TYPE SCREEN_MCU
#define OUT_FACE OUT_P16BPP4
+#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ
+
/* Timing */
#define H_PW 1
#define H_BP 1
screen->height = LCD_HEIGHT;
/* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
screen->hsync_len = H_PW;
/* Base */
#define OUT_TYPE SCREEN_RGB
#define OUT_FACE OUT_P888
-#define OUT_CLK 27
+#define OUT_CLK 27000000
+#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ
/* Timing */
#define H_PW 10
screen->height = LCD_HEIGHT;
/* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
screen->pixclock = OUT_CLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
\r
/* Base */\r
#define OUT_TYPE SCREEN_RGB\r
-#define OUT_FACE OUT_P888\r
-#define OUT_CLK 65\r
-#define LCDC_ACLK 150 //29 lcdc axi DMA ƵÂÊ\r
+#define OUT_FACE OUT_D888_P666\r
+#define OUT_CLK 65000000\r
+#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ\r
\r
/* Timing */\r
#define H_PW 10\r
screen->height = LCD_HEIGHT;\r
\r
/* Timing */\r
+ screen->lcdc_aclk = LCDC_ACLK;\r
screen->pixclock = OUT_CLK;\r
screen->left_margin = H_BP;\r
screen->right_margin = H_FP;\r
screen->pin_vsync = 0;\r
screen->pin_den = 0;\r
screen->pin_dclk = DCLK_POL;\r
- screen->lcdc_aclk = LCDC_ACLK;\r
\r
/* Swap rule */\r
screen->swap_rb = SWAP_RB;\r
/* Base */
#define OUT_TYPE SCREEN_RGB
#define OUT_FACE OUT_P888
-#define OUT_CLK 28
+#define OUT_CLK 28000000
+#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ
/* Timing */
#define H_PW 1
screen->height = LCD_HEIGHT;
/* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
screen->pixclock = OUT_CLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
/* Base */
#define OUT_TYPE SCREEN_RGB
#define OUT_FACE OUT_P666 /*OUT_P888*/
-#define OUT_CLK 10 //***27
+#define OUT_CLK 10000000 //***27
+#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ
/* Timing */
#define H_PW 8
screen->height = LCD_HEIGHT;
/* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
screen->pixclock = OUT_CLK;
screen->left_margin = H_BP; /*>2*/
screen->right_margin = H_FP; /*>2*/
/* Base */
#define OUT_TYPE SCREEN_RGB
#define OUT_FACE OUT_P888
-#define OUT_CLK 24
+#define OUT_CLK 24000000
+#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ
/* Timing */
#define H_PW 1
screen->height = LCD_HEIGHT;
/* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
screen->pixclock = OUT_CLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
#define LCD_WIDTH 480 //need modify
#define LCD_HEIGHT 800
+#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ
+
#define P_WR 27
#define USE_FMARK 0 //2 //ÊÇ·ñʹÓÃFMK (0:²»Ö§³Ö 1:ºáÆÁÖ§³Ö 2:ºáÊúÆÁ¶¼Ö§³Ö)
#define FRMRATE 60 //MCUÆÁµÄË¢ÐÂÂÊ (FMKÓÐЧʱÓÃ)
screen->height = LCD_HEIGHT;
/* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
screen->hsync_len = H_PW;
/* Base */
#define OUT_TYPE SCREEN_MCU
#define OUT_FACE OUT_P16BPP4
+#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ
/* Timing */
#define H_PW 1
screen->height = LCD_HEIGHT;
/* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
screen->hsync_len = H_PW;
/* Base */
#define OUT_TYPE SCREEN_RGB
#define OUT_FACE OUT_P888
-#define OUT_CLK 27
+#define OUT_CLK 27000000
+#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ
/* Timing */
#define H_PW 10
screen->height = LCD_HEIGHT;
/* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
screen->pixclock = OUT_CLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
/* Base */
#define OUT_TYPE SCREEN_RGB
#define OUT_FACE OUT_P888
-#define OUT_CLK 23
+#define OUT_CLK 23000000
+#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ
/* Timing */
#define H_PW 1
screen->height = LCD_HEIGHT;
/* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
screen->pixclock = OUT_CLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
LcdMskReg(inf, WIN0_COLOR_KEY_CTRL, m_COLORKEY_EN, v_COLORKEY_EN(0));
LcdMskReg(inf, WIN1_COLOR_KEY_CTRL, m_COLORKEY_EN, v_COLORKEY_EN(0));
- LcdWrReg(inf, DSP_CTRL0, 0);
LcdWrReg(inf, DSP_CTRL1, 0);
// initialize all interrupt
int ret = -EINVAL;
struct rk29fb_inf *inf = dev_get_drvdata(info->device);
struct rk29fb_screen *screen = inf->cur_screen;
- u16 face = screen->face;
+ u16 face;
u16 mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend;
u16 right_margin = screen->right_margin, lower_margin = screen->lower_margin;
u16 x_res = screen->x_res, y_res = screen->y_res;
u32 clk_rate = 0;
- u32 dclk_rate = 0;
u32 aclk_rate = 150000000;
- if(!g_pdev) return -1;
+ if(!g_pdev){
+ printk(">>>>>> %s : %s no g_pdev\n", __FILE__, __FUNCTION__);
+ return;
+ }
fbprintk(">>>>>> %s : %s \n", __FILE__, __FUNCTION__);
);
// set synchronous pin polarity and data pin swap rule
+ switch (screen->face)
+ {
+ case OUT_P565:
+ face = OUT_P565;
+ LcdMskReg(inf, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
+ break;
+ case OUT_P666:
+ face = OUT_P666;
+ LcdMskReg(inf, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
+ break;
+ case OUT_D888_P565:
+ face = OUT_P888;
+ LcdMskReg(inf, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
+ break;
+ case OUT_D888_P666:
+ face = OUT_P888;
+ LcdMskReg(inf, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
+ break;
+ case OUT_P888:
+ face = OUT_P888;
+ LcdMskReg(inf, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(1));
+ break;
+ default:
+ face = screen->face;
+ break;
+ }
+
LcdMskReg(inf, DSP_CTRL0,
m_DISPLAY_FORMAT | m_HSYNC_POLARITY | m_VSYNC_POLARITY | m_DEN_POLARITY |
m_DCLK_POLARITY | m_COLOR_SPACE_CONVERSION,
}
// set lcdc clk
- if(SCREEN_MCU==screen->type) screen->pixclock = 150; //mcu fix to 150 MHz
+ if(SCREEN_MCU==screen->type) screen->pixclock = 150000000; //mcu fix to 150 MHz
clk_set_parent(inf->dclk_divider, inf->dclk_parent);
clk_set_parent(inf->dclk, inf->dclk_divider);
clk_set_parent(inf->aclk, inf->aclk_parent);
- dclk_rate = screen->pixclock * 1000000;
-
fbprintk(">>>>>> set lcdc dclk need %d HZ, clk_parent = %d hz \n ", screen->pixclock, clk_rate);
- ret = clk_set_rate(inf->dclk_divider, dclk_rate);
+ ret = clk_set_rate(inf->dclk_divider, screen->pixclock);
if(ret)
{
printk(KERN_ERR ">>>>>> set lcdc dclk_divider faild \n ");
}
+
if(screen->lcdc_aclk){
- aclk_rate = screen->lcdc_aclk * 1000000;
+ aclk_rate = screen->lcdc_aclk;
}
ret = clk_set_rate(inf->aclk, aclk_rate);
if(ret){
struct rk29fb_inf *inf = dev_get_drvdata(info->device);
struct fb_var_screeninfo *var1 = &info->var;
struct fb_fix_screeninfo *fix1 = &info->fix;
- int i;
+
u32 offset = 0, addr = 0;
//fbprintk(">>>>>> %s : %s \n", __FILE__, __FUNCTION__);
#endif
#if 0
+ int i;
for(i=0;i<=(0xc0/4);i+=4)
{
fbprintk("0x%02X: 0x%08X 0x%08X 0x%08X 0x%08X \n", i*4,
}
msleep(100);
set_lcd_pin(g_pdev, 1);
- memcpy(inf->preg, &inf->regbak, 0xa4); //resume reg
+ memcpy((u8*)inf->preg, (u8*)&inf->regbak, 0xa4); //resume reg
}
struct suspend_info suspend_info = {
********************************************************************/
/* ÊäÍùÆÁµÄÊý¾Ý¸ñʽ */
#define OUT_P888 0
-#define OUT_P666 1
-#define OUT_P565 2
+#define OUT_P666 1 //666µÄÆÁ, ½ÓDATA0-17
+#define OUT_P565 2 //565µÄÆÁ, ½ÓDATA0-15
#define OUT_S888x 4
#define OUT_CCIR656 6
#define OUT_S888 8
#define OUT_S888DUMY 12
#define OUT_P16BPP4 24 //Ä£Äⷽʽ,¿ØÖÆÆ÷²¢²»Ö§³Ö
-
+#define OUT_D888_P666 0x21 //666µÄÆÁ, ½ÓDATA2-7, DATA10-15, DATA17-22
+#define OUT_D888_P565 0x22 //565µÄÆÁ, ½ÓDATA3-7, DATA10-15, DATA18-22
/* SYS_CONFIG */
#define m_W2_FORMAT (3<<0)