rk30: dynamic init memory size

diff --git a/arch/arm/mach-rk30/Makefile b/arch/arm/mach-rk30/Makefile
index 0dcea3b65050c41f4a9c1287d395663814f32a6e..af5fdab28bc54867c55898f66ba9fd1effca45f0 100755 (executable)
--- a/arch/arm/mach-rk30/Makefile
+++ b/arch/arm/mach-rk30/Makefile
@@ -1,6 +1,7 @@
 obj-y += clock.o
 obj-y += clock_data.o
 obj-y += common.o
+CFLAGS_common.o += -DTEXT_OFFSET=$(TEXT_OFFSET)
 obj-y += ddr.o
 obj-y += devices.o
 obj-y += io.o

diff --git a/arch/arm/mach-rk30/common.c b/arch/arm/mach-rk30/common.c
index e19e0e39770975b3b84e61e5db0ec81733a875dc..b85115b34117e06f1c88dfdda59ee3d9dd4f75bc 100755 (executable)
--- a/arch/arm/mach-rk30/common.c
+++ b/arch/arm/mach-rk30/common.c
@@ -3,6 +3,7 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 
+#include <asm/pgtable-hwdef.h>
 #include <asm/hardware/gic.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/cache-l2x0.h>
@@ -128,16 +129,43 @@ void __init rk30_map_io(void)
        rk29_sram_init();
        board_clock_init();
        rk30_l2_cache_init();
-    ddr_init(DDR_TYPE, DDR_FREQ);
+       ddr_init(DDR_TYPE, DDR_FREQ);
        rk30_iomux_init();
        rk30_boot_mode_init();
 }
 
+extern u32 ddr_get_cap(void);
+static __init u32 rk30_get_ddr_size(void)
+{
+       u32 size;
+       u32 v[3], a[3];
+       u32 pgtbl = PAGE_OFFSET + TEXT_OFFSET - 0x4000;
+       u32 flag = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ;
+
+       a[0] = pgtbl + (((u32)RK30_CPU_AXI_BUS_BASE >> 20) << 2);
+       a[1] = pgtbl + (((u32)RK30_DDR_PUBL_BASE >> 20) << 2);
+       a[2] = pgtbl + (((u32)RK30_GRF_BASE >> 20) << 2);
+       v[0] = readl_relaxed(a[0]);
+       v[1] = readl_relaxed(a[1]);
+       v[2] = readl_relaxed(a[2]);
+       writel_relaxed(flag | ((RK30_CPU_AXI_BUS_PHYS >> 20) << 20), a[0]);
+       writel_relaxed(flag | ((RK30_DDR_PUBL_PHYS >> 20) << 20), a[1]);
+       writel_relaxed(flag | ((RK30_GRF_PHYS >> 20) << 20), a[2]);
+
+       size = ddr_get_cap();
+
+       writel_relaxed(v[0], a[0]);
+       writel_relaxed(v[1], a[1]);
+       writel_relaxed(v[2], a[2]);
+
+       return size;
+}
+
 void __init rk30_fixup(struct machine_desc *desc, struct tag *tags,
                        char **cmdline, struct meminfo *mi)
 {
        mi->nr_banks = 1;
        mi->bank[0].start = PLAT_PHYS_OFFSET;
-       mi->bank[0].size = SZ_1G;
+       mi->bank[0].size = rk30_get_ddr_size();
 }